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| author | Martin Roth <martin@coreboot.org> | 2021-10-01 14:10:19 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2021-10-05 18:06:24 +0000 |
| commit | 6c3ece9c9ef73db5c0e02cc5a41c98f46b86c3e9 (patch) | |
| tree | 23a804c556938f20002a2727ac62495a9bb982fe /Documentation/getting_started | |
| parent | d4c55353e044e157994eaf15b78103a9473e5440 (diff) | |
| download | coreboot-6c3ece9c9ef73db5c0e02cc5a41c98f46b86c3e9.tar.gz coreboot-6c3ece9c9ef73db5c0e02cc5a41c98f46b86c3e9.tar.bz2 coreboot-6c3ece9c9ef73db5c0e02cc5a41c98f46b86c3e9.zip | |
Documentation: Fix spelling errors
These issues were found and fixed by codespell, a useful tool for
finding spelling errors.
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: If2a8e97911420c19e9365d5c28810b998f2c2ac8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58078
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/getting_started')
| -rw-r--r-- | Documentation/getting_started/architecture.md | 4 | ||||
| -rw-r--r-- | Documentation/getting_started/writing_documentation.md | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/Documentation/getting_started/architecture.md b/Documentation/getting_started/architecture.md index 8d63ac2c75e5..09fb96031fd9 100644 --- a/Documentation/getting_started/architecture.md +++ b/Documentation/getting_started/architecture.md @@ -41,7 +41,7 @@ The bootblock loads the romstage or the verstage if verified boot is enabled. ### Cache-As-Ram The *Cache-As-Ram*, also called Non-Eviction mode, or *CAR* allows to use the -CPU cache like regular SRAM. This is particullary usefull for high level +CPU cache like regular SRAM. This is particullary useful for high level languages like `C`, which need RAM for heap and stack. The CAR needs to be activated using vendor specific CPU instructions. @@ -85,7 +85,7 @@ The ramstage does the main device init: * CPU init (like set up SMM) After initialization tables are written to inform the payload or operating system -about the current hardware existance and state. That includes: +about the current hardware existence and state. That includes: * ACPI tables (x86 specific) * SMBIOS tables (x86 specific) diff --git a/Documentation/getting_started/writing_documentation.md b/Documentation/getting_started/writing_documentation.md index 384fc6d1fca9..480ad7872473 100644 --- a/Documentation/getting_started/writing_documentation.md +++ b/Documentation/getting_started/writing_documentation.md @@ -6,7 +6,7 @@ That said please always try to write documentation! One problem in the firmware development is the missing documentation. In this document you will get a brief introduction how to write, submit and publish -documenation to coreboot. +documentation to coreboot. ## Preparations |