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| author | Nico Huber <nico.h@gmx.de> | 2021-03-06 19:46:03 +0100 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2021-03-14 16:35:37 +0000 |
| commit | 3b14a5f92a696f98174a15c6af9fb3a351f6b00f (patch) | |
| tree | 081a59881e9e2f9596eea62f13217e3d6c13569f /Documentation/mainboard/lenovo | |
| parent | 4cd9ac0a55bdd010d6aeed841f51c480d1437724 (diff) | |
| download | coreboot-3b14a5f92a696f98174a15c6af9fb3a351f6b00f.tar.gz coreboot-3b14a5f92a696f98174a15c6af9fb3a351f6b00f.tar.bz2 coreboot-3b14a5f92a696f98174a15c6af9fb3a351f6b00f.zip | |
doc/mb/lenovo/montevina: Fix constants for 16MiB flash
The current values are actually for 32MiB and result in a brick if used
with a 16MiB chip because of the invalid bios region.
Change-Id: I08337394ce0d6e31e5c03cda2bfb3b9f0282f2c3
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51322
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Evgeny Zinoviev <me@ch1p.io>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/mainboard/lenovo')
| -rw-r--r-- | Documentation/mainboard/lenovo/montevina_series.md | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/Documentation/mainboard/lenovo/montevina_series.md b/Documentation/mainboard/lenovo/montevina_series.md index 3e406dfcad1c..693180893133 100644 --- a/Documentation/mainboard/lenovo/montevina_series.md +++ b/Documentation/mainboard/lenovo/montevina_series.md @@ -59,7 +59,7 @@ the `new_layout.txt` file: | | | | | 00000000:00000fff fd | 00000000:00000fff fd | 00000000:00000fff fd | | 00001000:00002fff gbe | 00001000:00002fff gbe | 00001000:00002fff gbe | -| 00003000:003fffff bios | 00003000:007fffff bios | 00003000:01ffffff bios | +| 00003000:003fffff bios | 00003000:007fffff bios | 00003000:00ffffff bios | | 00fff000:00000fff pd | 00fff000:00000fff pd | 00fff000:00000fff pd | | 00fff000:00000fff me | 00fff000:00000fff me | 00fff000:00000fff me | +---------------------------+---------------------------+---------------------------+ @@ -108,7 +108,7 @@ If your flash is not 8 MiB, you need to change values of `flcomp_density1` and +=================+=======+=======+========+ | flcomp_density1 | 0x3 | 0x4 | 0x5 | +-----------------+-------+-------+--------+ -| flreg1_limit | 0x3ff | 0x7ff | 0x1fff | +| flreg1_limit | 0x3ff | 0x7ff | 0xfff | +-----------------+-------+-------+--------+ ``` @@ -127,7 +127,7 @@ to flash descriptor and gbe dump. ``` Mainboard ---> ROM chip size (8192 KB (8 MB)) # According to your chip - (0x7fd000) Size of CBFS filesystem in ROM # or 0x3fd000 for 4 MiB chip / 0x1ffd000 for 16 MiB chip + (0x7fd000) Size of CBFS filesystem in ROM # or 0x3fd000 for 4 MiB chip / 0xffd000 for 16 MiB chip Chipset ---> [*] Add Intel descriptor.bin file |