summaryrefslogtreecommitdiffstats
path: root/Documentation/security
diff options
context:
space:
mode:
authorPatrick Rudolph <patrick.rudolph@9elements.com>2019-02-21 10:27:04 +0100
committerPhilipp Deppenwiese <zaolin.daisuki@gmail.com>2019-07-02 08:45:50 +0000
commitc1b7e8a60be9853b5b00fc70615cea2fa8bfafc5 (patch)
treebddec84d4dfa2bae068eb73fe6e85a1c2594ba58 /Documentation/security
parentc796a8f238f70a09828d5c40c23c05650803cb3c (diff)
downloadcoreboot-c1b7e8a60be9853b5b00fc70615cea2fa8bfafc5.tar.gz
coreboot-c1b7e8a60be9853b5b00fc70615cea2fa8bfafc5.tar.bz2
coreboot-c1b7e8a60be9853b5b00fc70615cea2fa8bfafc5.zip
cpu/x86/pae/pgtbl: Add memset with PAE
To clear all DRAM on x86_32, add a new method that uses PAE to access more than 32bit of address space. Add Documentation as well. Required for clearing all system memory as part of security API. Tested on wedge100s: Takes less than 2 seconds to clear 8GiB of DRAM. Tested on P8H61M-Pro: Takes less than 1 second to clear 4GiB of DRAM. Change-Id: I00f7ecf87b5c9227a9d58a0b61eecc38007e1a57 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31549 Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/security')
-rw-r--r--Documentation/security/memory_clearing.md4
1 files changed, 4 insertions, 0 deletions
diff --git a/Documentation/security/memory_clearing.md b/Documentation/security/memory_clearing.md
index 3d985925d926..e5c19256b941 100644
--- a/Documentation/security/memory_clearing.md
+++ b/Documentation/security/memory_clearing.md
@@ -42,3 +42,7 @@ Without MTRRs (and caches enabled) clearing memory takes multiple seconds.
As some platforms place code and stack in DRAM (FSP1.0), the regions can be
skipped.
+
+## Architecture specific implementations
+
+* [x86 PAE](../arch/x86/pae.md)