diff options
| author | Martin Roth <martin@coreboot.org> | 2021-10-01 14:10:19 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2021-10-05 18:06:24 +0000 |
| commit | 6c3ece9c9ef73db5c0e02cc5a41c98f46b86c3e9 (patch) | |
| tree | 23a804c556938f20002a2727ac62495a9bb982fe /Documentation/soc/cavium | |
| parent | d4c55353e044e157994eaf15b78103a9473e5440 (diff) | |
| download | coreboot-6c3ece9c9ef73db5c0e02cc5a41c98f46b86c3e9.tar.gz coreboot-6c3ece9c9ef73db5c0e02cc5a41c98f46b86c3e9.tar.bz2 coreboot-6c3ece9c9ef73db5c0e02cc5a41c98f46b86c3e9.zip | |
Documentation: Fix spelling errors
These issues were found and fixed by codespell, a useful tool for
finding spelling errors.
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: If2a8e97911420c19e9365d5c28810b998f2c2ac8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58078
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/soc/cavium')
| -rw-r--r-- | Documentation/soc/cavium/cn81xx/index.md | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/soc/cavium/cn81xx/index.md b/Documentation/soc/cavium/cn81xx/index.md index 3063b946d033..684948cfd634 100644 --- a/Documentation/soc/cavium/cn81xx/index.md +++ b/Documentation/soc/cavium/cn81xx/index.md @@ -21,7 +21,7 @@ The SOC folder contains functions for: * Secondary CPUs * PCI -All other hardware is initilized by the BDK code, which is invoked from +All other hardware is initialized by the BDK code, which is invoked from ramstage. ## Notes about the hardware |