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| author | Angel Pons <th3fanbus@gmail.com> | 2019-04-18 15:46:35 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2019-06-17 08:16:46 +0000 |
| commit | 9065657957f5cb8c5a02695af7528263cfdceeaa (patch) | |
| tree | 3be74028142dd13fd8ada3790d442c039cb2f0b2 /Documentation/soc/intel | |
| parent | 01c83a2e9975f71d53772a535cf13d3e76a46827 (diff) | |
| download | coreboot-9065657957f5cb8c5a02695af7528263cfdceeaa.tar.gz coreboot-9065657957f5cb8c5a02695af7528263cfdceeaa.tar.bz2 coreboot-9065657957f5cb8c5a02695af7528263cfdceeaa.zip | |
src/mb/gigabyte/ga-h61m-s2pv: Correct devicetree
Subsystem IDs were missing and GPIO settings were wrong. Plus, the PCI
bridge was erroneously enabled, this board uses an ITE IT8892E PCIe to
PCI bridge instead.
Tested, board still boots.
Change-Id: Ieb9dd8c835bc3652e7a3a118feca5551196bb81b
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33522
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'Documentation/soc/intel')
0 files changed, 0 insertions, 0 deletions