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authorJonathan Neuschäfer <j.neuschaefer@gmx.net>2018-12-11 17:53:07 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-12-18 13:24:28 +0000
commit45e6c82e682fcfa7155f0e0193bf4c666b1d6466 (patch)
tree271637254114b391f7ed94c536aa15eec9fc0f4c /Documentation
parent7ccb2821d27624d97e9728629bf675242d4966d8 (diff)
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Fix typos involving "the the"
Change-Id: I179264ee6681a7ba4488b9f1c6bce1a19b4e1772 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/c/30160 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/Intel/development.html6
-rw-r--r--Documentation/cbfs.txt2
-rw-r--r--Documentation/getting_started/gerrit_guidelines.md2
3 files changed, 5 insertions, 5 deletions
diff --git a/Documentation/Intel/development.html b/Documentation/Intel/development.html
index 24b2fa926103..92b1d4be8de7 100644
--- a/Documentation/Intel/development.html
+++ b/Documentation/Intel/development.html
@@ -264,7 +264,7 @@
<ul>
<li>MemoryInit UPD values are correct</li>
<li>MemoryInit returns 0 (success) and</li>
- <li>The the message "ERROR - coreboot's requirements not met by FSP binary!"
+ <li>The message "ERROR - coreboot's requirements not met by FSP binary!"
is not displayed
</li>
</ul>
@@ -324,7 +324,7 @@
<ul>
<li>MemoryInit UPD values are correct</li>
<li>MemoryInit returns 0 (success) and</li>
- <li>The the message "ERROR - coreboot's requirements not met by FSP binary!"
+ <li>The message "ERROR - coreboot's requirements not met by FSP binary!"
is not displayed
</li>
</ul>
@@ -374,4 +374,4 @@
<hr>
<p>Modified: 4 March 2016</p>
</body>
-</html> \ No newline at end of file
+</html>
diff --git a/Documentation/cbfs.txt b/Documentation/cbfs.txt
index 6d4e387ea1a4..831e882804e8 100644
--- a/Documentation/cbfs.txt
+++ b/Documentation/cbfs.txt
@@ -174,7 +174,7 @@ with
regards to the erase block sizes on the ROM - allowing one to replace a
component at runtime without disturbing the others.
-'offset' is the offset of the the first CBFS component (from the start of
+'offset' is the offset of the first CBFS component (from the start of
the ROM). This is to allow for arbitrary space to be left at the beginning
of the ROM for things like embedded controller firmware.
diff --git a/Documentation/getting_started/gerrit_guidelines.md b/Documentation/getting_started/gerrit_guidelines.md
index 9210c8448e1f..b0a96096e9c1 100644
--- a/Documentation/getting_started/gerrit_guidelines.md
+++ b/Documentation/getting_started/gerrit_guidelines.md
@@ -150,7 +150,7 @@ together so people can easily see the connection at the top level of
gerrit. Topics can be set for individual patches in gerrit by going into
the patch and clicking on the icon next to the topic line. Topics can also
be set when you push the patches into gerrit. For example, to push a set of
-commits with the the i915-kernel-x60 set, use the command:
+commits with the i915-kernel-x60 set, use the command:
git push origin HEAD:refs/for/master/i915-kernel-x60
* If one of your patches isn't ready to be merged, make sure it's obvious