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| author | Arthur Heymans <arthur@aheymans.xyz> | 2022-04-19 20:48:42 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-04-25 14:00:41 +0000 |
| commit | 597b9e9d71a2dd728e4192fa9a083004c96cdfbc (patch) | |
| tree | 02a1e721719751f6968eeeae0692d19099dd23c6 /Documentation | |
| parent | 34f5cd9cb233dea539a94ff2cc8c06effced988d (diff) | |
| download | coreboot-597b9e9d71a2dd728e4192fa9a083004c96cdfbc.tar.gz coreboot-597b9e9d71a2dd728e4192fa9a083004c96cdfbc.tar.bz2 coreboot-597b9e9d71a2dd728e4192fa9a083004c96cdfbc.zip | |
cpu/x86/64bit: Generate static page tables from an assembly file
This removes the need for a tool to generate simple identity pages.
Future patches will link this page table directly into the stages on
some platforms so having an assembly file makes a lot of sense.
This also optimizes the size of the page of each 4K page by placing
the PDPE_table below the PDE.
Change-Id: Ia1e31b701a2584268c85d327bf139953213899e3
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63725
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/arch/x86/index.md | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/Documentation/arch/x86/index.md b/Documentation/arch/x86/index.md index a30c5e25f83c..c7115b46d25d 100644 --- a/Documentation/arch/x86/index.md +++ b/Documentation/arch/x86/index.md @@ -26,9 +26,7 @@ In order to add support for x86_64 the following assumptions were made: * A stage can install new page tables in RAM ## Page tables -Page tables are generated by a tool in `util/pgtblgen/pgtblgen`. It writes -the page tables to a file which is then included into the CBFS as file called -`pagetables`. +A `pagetables` cbfs file is generated based on an assembly file. To generate the static page tables it must know the physical address where to place the file. |