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| author | Rex-BC Chen <rex-bc.chen@mediatek.com> | 2022-05-06 14:52:01 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2022-05-09 05:09:45 +0000 |
| commit | d4cdf5d5811dd9ba30421e8b366598f276a6ca2a (patch) | |
| tree | 89c3da0e491f01ad5ae7d64b5f42e5c39a3d6428 /Documentation | |
| parent | c53a0aaa594903194ecd25b07b270b424a45cb8a (diff) | |
| download | coreboot-d4cdf5d5811dd9ba30421e8b366598f276a6ca2a.tar.gz coreboot-d4cdf5d5811dd9ba30421e8b366598f276a6ca2a.tar.bz2 coreboot-d4cdf5d5811dd9ba30421e8b366598f276a6ca2a.zip | |
soc/mediatek: Demote log level of SPMI clock calibration problem to info
It's expected that the mismatch logs will be shown when doing
calibration for spmi clock. If it is failed to do calibration for spmi
clock for all data, the system will enter "die". Therefore, we adjust
the log level from BIOS_ERR to BIOS_INFO.
BUG=b:231531254
TEST=emerge-cherry coreboot
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I148b4aeaaeb10e1c269a8eccbb19e8d8e17e40ff
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64090
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation')
0 files changed, 0 insertions, 0 deletions