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authorJonathan Neuschäfer <j.neuschaefer@gmx.net>2018-04-22 12:53:41 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-04-26 11:58:12 +0000
commitf895216c4f778422d514747672b6fb5890f27359 (patch)
treebcdc672f98d9139179804f82d5b67dd86910bf43 /Documentation
parent3eee533d933d9bb21da194ad7ee04415c4fda797 (diff)
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Documentation: SandyBridge_registers.md: Add a title
This fixes the following error when using "make -C Documentation sphinx": /.../Documentation/Intel/NativeRaminit/Sandybridge.md:32: WARNING: toctree contains reference to document u'Intel/NativeRaminit/SandyBridge_registers' that doesn't have a title: no link will be generated Change-Id: Id273b8dbc96465833b8e2b2e78c3bac8cd217d4b Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/25788 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/Intel/NativeRaminit/SandyBridge_registers.md2
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/Intel/NativeRaminit/SandyBridge_registers.md b/Documentation/Intel/NativeRaminit/SandyBridge_registers.md
index c96189088c9c..913d52e91be3 100644
--- a/Documentation/Intel/NativeRaminit/SandyBridge_registers.md
+++ b/Documentation/Intel/NativeRaminit/SandyBridge_registers.md
@@ -1,4 +1,4 @@
-Inoffical Documentation of Intel MCHBAR register space.
+# Inoffical Documentation of Intel MCHBAR register space.
The MCHBAR can be enabled by using register 0x48 of PCI(0:0:0) device.