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author | Michael Niewöhner <foss@mniewoehner.de> | 2020-11-25 16:36:18 +0100 |
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committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-11-28 12:57:08 +0000 |
commit | 84fde762e7c4e1a8e43194a9444b10b681e1cb50 (patch) | |
tree | c5727aaeed4cc7e59b70b6d3319c36c1cb78a9d1 /LICENSES | |
parent | 43dd2e458f75b5d398553611f2efc818c6b18c89 (diff) | |
download | coreboot-84fde762e7c4e1a8e43194a9444b10b681e1cb50.tar.gz coreboot-84fde762e7c4e1a8e43194a9444b10b681e1cb50.tar.bz2 coreboot-84fde762e7c4e1a8e43194a9444b10b681e1cb50.zip |
soc/intel/skl: correct OC pin skip value for disabled usb ports
Commit 056d552 introduced a bug where 0xFF gets set as OC pin value to
supposedly skip programming an OC pin for a disabled USB port. While the
value is correct for the other platforms, Skylake uses 0x08 for this
purpose. Correct this by using the enum value OC_SKIP (0x08) instead.
Change-Id: I41a8df3dce3712b4ab27c4e6e10160b2207406d1
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48003
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Diffstat (limited to 'LICENSES')
0 files changed, 0 insertions, 0 deletions