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| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2018-03-09 14:20:25 +0100 |
|---|---|---|
| committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2018-09-16 13:02:50 +0000 |
| commit | 0f8bf022fca97659efef400794d38ec0d1f48d2b (patch) | |
| tree | 28938953b32650e403459943cf03a4dc535ceeb1 /configs/config.pcengines_apu2 | |
| parent | ee8780eb788047755b5cbb6915b42f9adab533e6 (diff) | |
| download | coreboot-0f8bf022fca97659efef400794d38ec0d1f48d2b.tar.gz coreboot-0f8bf022fca97659efef400794d38ec0d1f48d2b.tar.bz2 coreboot-0f8bf022fca97659efef400794d38ec0d1f48d2b.zip | |
drivers/spi: Read Winbond's flash protection bits
Extend the generic flash interface to probe for write protected regions.
Add Winbond custom code to return flash protection.
Tested on Cavium EVB CN81xx using W25Q128.
Change-Id: I933a8abdc28174ec32acf323c102d606b58c1ea5
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/25082
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'configs/config.pcengines_apu2')
0 files changed, 0 insertions, 0 deletions