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| author | Andrey Petrov <andrey.petrov@intel.com> | 2016-12-07 10:47:46 -0800 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-12-08 21:40:31 +0100 |
| commit | a697c19640527b67c4a25150ad8d01340d434a69 (patch) | |
| tree | 2e5e870dd317a86c553fbcf72ec816e264751d8f /configs | |
| parent | b21e362e93993a8879906cf3fa56586b84226920 (diff) | |
| download | coreboot-a697c19640527b67c4a25150ad8d01340d434a69.tar.gz coreboot-a697c19640527b67c4a25150ad8d01340d434a69.tar.bz2 coreboot-a697c19640527b67c4a25150ad8d01340d434a69.zip | |
soc/intel/apollolake: Move privilege drop to later stage
Previously privilege drop was happening "too early" and that caused some
PMC IPC programming (performed in FSP) to fail because sideband was
already locked out. This change set moves privilege drop to later stage,
after last FSP notify call.
BRANCH=reef
BUG=chrome-os-partner:60657
TEST=iotools rdmsr X 0x121, make sure they can't be read.
Also dmesg|grep -i IPC to make sure there are no errors related
Change-Id: Ia3a774aee5fbf92805a5c69093bfbd3d7682c3a7
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/17769
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'configs')
0 files changed, 0 insertions, 0 deletions