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| author | Prasad Malisetty <pmaliset@codeaurora.org> | 2021-08-28 06:53:37 +0530 |
|---|---|---|
| committer | Shelley Chen <shchen@google.com> | 2022-08-01 18:04:54 +0000 |
| commit | 857d3781e2f70894f3d5b5064e70ff3c275a6149 (patch) | |
| tree | c5901895dfedc3ac858c503ac7c93741a252d90f /payloads/libpayload/Kconfig | |
| parent | 16611f31eb462312068a16ccbf66972bfb5c6262 (diff) | |
| download | coreboot-857d3781e2f70894f3d5b5064e70ff3c275a6149.tar.gz coreboot-857d3781e2f70894f3d5b5064e70ff3c275a6149.tar.bz2 coreboot-857d3781e2f70894f3d5b5064e70ff3c275a6149.zip | |
libpayload/pci: Add pci_map_bus function for Qualcomm platform
Add 'pci_map_bus' function and PCIE_QCOM config for Qualcomm platform.
BUG=b:182963902,b:216686574,b:181098581
TEST=Verified on Qualcomm sc7280 development board with NVMe endpoint
(Koixa NVMe, Model-KBG40ZPZ256G with FW AEGA0102). Confirmed NVMe is
getting detected in response to 'storage init' command in depthcharge
CLI prompt.
Output logs:
->dpch: storage init
Initializing NVMe controller 1e0f:0001
Identified NVMe model KBG40ZPZ256G TOSHIBA MEMORY
Added NVMe drive "NVMe Namespace 1" lbasize:512, count:0x1dcf32b0
* 0: NVMe Namespace 1
1 devices total
Also verified NVMe boot path that is depthcharge is able to load the
kernel image from NVMe storage.
Change-Id: I7d1217502cbd7d4d0cdd298919ae82435630d61c
Signed-off-by: Prasad Malisetty <quic_pmaliset@quicinc.com>
Signed-off-by: Veerabhadrarao Badiganti <quic_vbadigan@quicinc.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57615
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'payloads/libpayload/Kconfig')
| -rw-r--r-- | payloads/libpayload/Kconfig | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/payloads/libpayload/Kconfig b/payloads/libpayload/Kconfig index 7c5a95bafdba..fcef18a7f0f7 100644 --- a/payloads/libpayload/Kconfig +++ b/payloads/libpayload/Kconfig @@ -418,6 +418,11 @@ config PCIE_MEDIATEK depends on PCI && !PCI_IO_OPS default n +config PCIE_QCOM + bool "Support for PCIe devices on Qualcomm platforms" + depends on PCI && !PCI_IO_OPS + default n + config NVRAM bool "Support for reading/writing NVRAM bytes" depends on ARCH_X86 # for now |