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authorFurquan Shaikh <furquan@google.com>2014-09-04 15:03:48 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-03-21 13:35:53 +0100
commitc10e7f2de91f8365784756b67c8f4cd99ba2e56b (patch)
tree1da3a0727efab51ddf082a76a5c28984b3414c2a /payloads/libpayload/arch
parent678dee08f6e1c265c9663e6f5645d4a7ea2d983d (diff)
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libpayload arm64: Add functions for {read/write}_tcr_current
BUG=chrome-os-partner:31634 BRANCH=None TEST=Compiles successfully Change-Id: I7a3dc9420fa85fa8f7ab70f0f55b200f432d3240 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 20c89d5df653ad65ad6d8ecc4c26de4c5e447564 Original-Change-Id: Ibd801ef1d777d306f35dde3c2b120af41d8f27e4 Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/216819 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/8786 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'payloads/libpayload/arch')
-rw-r--r--payloads/libpayload/arch/arm64/lib/sysctrl.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/payloads/libpayload/arch/arm64/lib/sysctrl.c b/payloads/libpayload/arch/arm64/lib/sysctrl.c
index 7e06e2965877..13c9309f080e 100644
--- a/payloads/libpayload/arch/arm64/lib/sysctrl.c
+++ b/payloads/libpayload/arch/arm64/lib/sysctrl.c
@@ -757,6 +757,16 @@ void raw_write_tcr_el3(uint32_t tcr_el3)
__asm__ __volatile__("msr TCR_EL3, %0\n\t" : : "r" (tcr_el3) : "memory");
}
+uint64_t raw_read_tcr_current(void)
+{
+ SWITCH_CASE_READ(raw_read_tcr, tcr, uint64_t);
+}
+
+void raw_write_tcr_current(uint64_t tcr)
+{
+ SWITCH_CASE_WRITE(raw_write_tcr, tcr);
+}
+
/* TTBR0 */
uint64_t raw_read_ttbr0_el1(void)
{