libpayload: honor TSC information under CONFIG_LP_TIMER_RDTSC

When CONFIG_LP_TIMER_RDTSC is enabled honor the TSC information
exported in the coreboot tables as the cpu_khz frequency. That
allows get_cpu_speed() not to be called which currently relies
on the 8254 PIT. As certain x86 platforms allow that device
to be optional or turned off for power saving reasons, allow
a path where get_cpu_speed() is no longer called. Additionally,
this approach also allows the libpayload to not duplicate logic
that already exists in coreboot.

BUG=chrome-os-partner:50214
BRANCH=glados
TEST=Confirmed in payload TSC frequency is honored instead of
     using get_cpu_speed().

Change-Id: Ib8993afdfb49065d43de705d6dbbdb9174b6f2c4
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/13671
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>

3 files changed, 33 insertions, 4 deletions

diff --git a/payloads/libpayload/arch/x86/sysinfo.c b/payloads/libpayload/arch/x86/sysinfo.c
index c3336b81e4a9..ddd6550e08ef 100644
--- a/payloads/libpayload/arch/x86/sysinfo.c
+++ b/payloads/libpayload/arch/x86/sysinfo.c
@@ -32,12 +32,14 @@
 #include <coreboot_tables.h>
 #include <multiboot_tables.h>
 
+#define CPU_KHZ_DEFAULT 200
+
 /**
  * This is a global structure that is used through the library - we set it
  * up initially with some dummy values - hopefully they will be overridden.
  */
 struct sysinfo_t lib_sysinfo = {
-	.cpu_khz = 200,
+	.cpu_khz = CPU_KHZ_DEFAULT,
 #if IS_ENABLED(CONFIG_LP_SERIAL_CONSOLE)
 	.ser_ioport = CONFIG_LP_SERIAL_IOBASE,
 #else
@@ -49,9 +51,6 @@ int lib_get_sysinfo(void)
 {
 	int ret;
 
-	/* Get the CPU speed (for delays). */
-	lib_sysinfo.cpu_khz = get_cpu_speed();
-
 #if IS_ENABLED(CONFIG_LP_MULTIBOOT)
 	/* Get the information from the multiboot tables,
 	 * if they exist */
@@ -63,6 +62,10 @@ int lib_get_sysinfo(void)
 
 	ret = get_coreboot_info(&lib_sysinfo);
 
+	/* Get the CPU speed (for delays) if not set from the default value. */
+	if (lib_sysinfo.cpu_khz == CPU_KHZ_DEFAULT)
+		lib_sysinfo.cpu_khz = get_cpu_speed();
+
 	if (!lib_sysinfo.n_memranges) {
 		/* If we can't get a good memory range, use the default. */
 		lib_sysinfo.n_memranges = 2;
diff --git a/payloads/libpayload/include/coreboot_tables.h b/payloads/libpayload/include/coreboot_tables.h
index 24cbf453eb13..276f25fe894c 100644
--- a/payloads/libpayload/include/coreboot_tables.h
+++ b/payloads/libpayload/include/coreboot_tables.h
@@ -268,6 +268,14 @@ struct cb_boot_media_params {
 	uint64_t boot_media_size;
 };
 
+#define CB_TAG_TSC_INFO 0x0032
+struct cb_tsc_info {
+	uint32_t tag;
+	uint32_t size;
+
+	uint32_t freq_khz;
+};
+
 #define CB_TAG_SERIALNO		0x002a
 #define CB_MAX_SERIALNO_LENGTH	32
 
diff --git a/payloads/libpayload/libc/coreboot.c b/payloads/libpayload/libc/coreboot.c
index 3e248e19c328..3abd610be2ba 100644
--- a/payloads/libpayload/libc/coreboot.c
+++ b/payloads/libpayload/libc/coreboot.c
@@ -231,6 +231,19 @@ static void cb_parse_boot_media_params(unsigned char *ptr,
 	info->boot_media_size = bmp->boot_media_size;
 }
 
+#if IS_ENABLED(CONFIG_LP_TIMER_RDTSC)
+static void cb_parse_tsc_info(void *ptr, struct sysinfo_t *info)
+{
+	const struct cb_tsc_info *tsc_info = ptr;
+
+	if (tsc_info->freq_khz == 0)
+		return;
+
+	/* Honor the TSC frequency passed to the payload. */
+	info->cpu_khz = tsc_info->freq_khz;
+}
+#endif
+
 int cb_parse_header(void *addr, int len, struct sysinfo_t *info)
 {
 	struct cb_header *header;
@@ -386,6 +399,11 @@ int cb_parse_header(void *addr, int len, struct sysinfo_t *info)
 		case CB_TAG_BOOT_MEDIA_PARAMS:
 			cb_parse_boot_media_params(ptr, info);
 			break;
+#if IS_ENABLED(CONFIG_LP_TIMER_RDTSC)
+		case CB_TAG_TSC_INFO:
+			cb_parse_tsc_info(ptr, info);
+			break;
+#endif
 		default:
 			cb_parse_arch_specific(rec, info);
 			break;