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| author | Veerabhadrarao Badiganti <quic_vbadigan@quicinc.com> | 2022-07-05 12:18:09 +0530 |
|---|---|---|
| committer | Shelley Chen <shchen@google.com> | 2022-08-01 18:04:54 +0000 |
| commit | 7a0440afc6d8aadb6208e16756b819a4a274b3bd (patch) | |
| tree | aa591b4d1f507a73b9c8862d30be28be57867d28 /payloads | |
| parent | 857d3781e2f70894f3d5b5064e70ff3c275a6149 (diff) | |
| download | coreboot-7a0440afc6d8aadb6208e16756b819a4a274b3bd.tar.gz coreboot-7a0440afc6d8aadb6208e16756b819a4a274b3bd.tar.bz2 coreboot-7a0440afc6d8aadb6208e16756b819a4a274b3bd.zip | |
libpayload: Enable PCIe driver for sc7280
Enable PCIe driver for herobrine board.
BUG=b:182963902,b:216686574,b:181098581
TEST=Verified on Qualcomm sc7280 development board with NVMe card
(Koixa NVMe, Model-KBG40ZPZ256G with FW AEGA0102). Confirmed NVMe is
getting detected in response to 'storage init' command in depthcharge
CLI prompt.
Output logs:
->dpch: storage init
Initializing NVMe controller 1e0f:0001
Identified NVMe model KBG40ZPZ256G TOSHIBA MEMORY
Added NVMe drive "NVMe Namespace 1" lbasize:512, count:0x1dcf32b0
* 0: NVMe Namespace 1
1 devices total
Also verified NVMe boot path, that is depthcharge is able to load the
kernel image from NVMe storage.
Change-Id: Idb693ca219ba1e5dfc8aec34027085b53af49a2c
Signed-off-by: Veerabhadrarao Badiganti <quic_vbadigan@quicinc.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65661
Reviewed-by: Shelley Chen <shchen@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'payloads')
| -rw-r--r-- | payloads/libpayload/configs/config.herobrine | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/payloads/libpayload/configs/config.herobrine b/payloads/libpayload/configs/config.herobrine index 18ca19dc003a..c7c6462c8d9d 100644 --- a/payloads/libpayload/configs/config.herobrine +++ b/payloads/libpayload/configs/config.herobrine @@ -3,3 +3,5 @@ CONFIG_LP_ARCH_ARM64=y CONFIG_LP_TIMER_ARM64_ARCH=y CONFIG_LP_SERIAL_CONSOLE=y CONFIG_LP_QUALCOMM_QUPV3_SERIAL_CONSOLE=y +CONFIG_LP_PCI=y +CONFIG_LP_PCIE_QCOM=y |