Fewer errors. The weird part: I had to move all the i82801gx south files to be compiled to the mainboard.

Why? Because the board doesn't use ide support. So you can't compile that in, it's not in the dts. 
the mainboard Makefile picks the southbridge .c's to use. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@1009 f3766cd6-281f-0410-b1cd-43a5c92072e9

9 files changed, 22 insertions, 35 deletions

diff --git a/southbridge/intel/i82801gx/Makefile b/southbridge/intel/i82801gx/Makefile
index 5e623fcb1fc6..91eb36dcaca2 100644
--- a/southbridge/intel/i82801gx/Makefile
+++ b/southbridge/intel/i82801gx/Makefile
@@ -24,18 +24,6 @@ ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_I82801GX),y)
 STAGE2_CHIPSET_SRC += $(src)/southbridge/intel/i82801gx/i82801gx.c
 
 STAGE2_CHIPSET_SRC += \
-					$(src)/southbridge/intel/i82801gx/ac97.c \
- 					$(src)/southbridge/intel/i82801gx/ide.c \
- 					$(src)/southbridge/intel/i82801gx/lpc.c \
- 					$(src)/southbridge/intel/i82801gx/nic.c \
-					$(src)/southbridge/intel/i82801gx/pci.c \
-					$(src)/southbridge/intel/i82801gx/pcie.c \
-					$(src)/southbridge/intel/i82801gx/sata.c \
-					$(src)/southbridge/intel/i82801gx/smbus.c \
-					$(src)/southbridge/intel/i82801gx/usb_ehci.c \
-  					$(src)/southbridge/intel/i82801gx/usb.c	\
-  					$(src)/southbridge/intel/i82801gx/watchdog.c
-#					$(src)/southbridge/intel/i82801gx/libsmbus.c \
 					
 STAGE0_CHIPSET_SRC += \
 					$(src)/southbridge/intel/i82801gx/stage1_smbus.c \
diff --git a/southbridge/intel/i82801gx/ac97.c b/southbridge/intel/i82801gx/ac97.c
index a505b476c323..a479a309c975 100644
--- a/southbridge/intel/i82801gx/ac97.c
+++ b/southbridge/intel/i82801gx/ac97.c
@@ -38,7 +38,7 @@ static void ac97_modem_init(struct device *dev)
 {
 	// XXX init modem?
 }
-
+void i82801gx_enable(struct device * dev);
 /* 82801GB/GR/GDH/GBM/GHM (ICH7/ICH7R/ICH7DH/ICH7-M/ICH7-M DH) */
 /* Note: 82801GU (ICH7-U) doesn't have AC97 audio. */
 struct device_operations ac97audio = {
diff --git a/southbridge/intel/i82801gx/lpc.c b/southbridge/intel/i82801gx/lpc.c
index 3ee589243da1..246b485248ce 100644
--- a/southbridge/intel/i82801gx/lpc.c
+++ b/southbridge/intel/i82801gx/lpc.c
@@ -25,6 +25,7 @@
 #include <msr.h>
 #include <legacy.h>
 #include <device/pci_ids.h>
+#include <io.h>
 #include <statictree.h>
 #include <config.h>
 #include "i82801gx.h"
@@ -144,7 +145,7 @@ static void i82801gx_power_options(struct device * dev)
 	reg8 |= (3 << 4);	/* avoid #S4 assertions */
 
 	pci_write_config8(dev, GEN_PMCON_3, reg8);
-	printk_info("Set power %s after power failure.\n", pwr_on ? "on" : "off");
+	printk(BIOS_INFO, "Set power %s after power failure.\n", pwr_on ? "on" : "off");
 
 	/* Set up NMI on errors. */
 	reg8 = inb(0x61);
@@ -329,7 +330,7 @@ static void set_subsystem(struct device * dev, unsigned vendor, unsigned device)
 static struct pci_operations pci_ops = {
 	.set_subsystem = set_subsystem,
 };
-
+void i82801gx_enable(struct device * dev);
 /* 82801GB/GR/GDH (ICH7/ICH7R/ICH7DH) */
 struct device_operations ich7_ich7r_ich7dh_lpc = {
 	.id = {.type = DEVICE_ID_PCI,
diff --git a/southbridge/intel/i82801gx/nic.c b/southbridge/intel/i82801gx/nic.c
index f7b57ecc9e2b..76a800dcb91d 100644
--- a/southbridge/intel/i82801gx/nic.c
+++ b/southbridge/intel/i82801gx/nic.c
@@ -38,7 +38,7 @@ static void nic_init(struct device *dev)
 /* 82801GB/GR/GDH/GBM/GHM (ICH7/ICH7R/ICH7DH/ICH7-M/ICH7-M DH) */
 /* Note: 82801GU (ICH7-U) doesn't have a NIC. */
 /* PCI ID loaded from EEPROM. If EEPROM is 0, 0x27dc is used. */
-struct device_operations  = {
+struct device_operations  i82801gx_nic= {
 	.id = {.type = DEVICE_ID_PCI,
 		{.pci = {.vendor = PCI_VENDOR_ID_INTEL,
 			      .device = 0x27dc}}},
diff --git a/southbridge/intel/i82801gx/pci.c b/southbridge/intel/i82801gx/pci.c
index d78042e7b0ae..7c27f16d7580 100644
--- a/southbridge/intel/i82801gx/pci.c
+++ b/southbridge/intel/i82801gx/pci.c
@@ -61,7 +61,7 @@ static void ich_pci_dev_enable_resources(struct device *dev)
 	/* Set the subsystem vendor and device id for mainboard devices */
 	ops = ops_pci(dev);
 	if (dev->on_mainboard && ops && ops->set_subsystem) {
-		printk_debug("%s subsystem <- %02x/%02x\n",
+		printk(BIOS_DEBUG, "%s subsystem <- %02x/%02x\n",
 			dev_path(dev), 
 			MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID,
 			MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID);
@@ -77,7 +77,7 @@ static void ich_pci_dev_enable_resources(struct device *dev)
 	 */
 	command = pci_read_config16(dev, PCI_COMMAND);
 	command |= dev->command;
-	printk_debug("%s cmd <- %02x\n", dev_path(dev), command);
+	printk(BIOS_DEBUG, "%s cmd <- %02x\n", dev_path(dev), command);
 	pci_write_config16(dev, PCI_COMMAND, command);
 #endif
 }
@@ -93,7 +93,7 @@ static void ich_pci_bus_enable_resources(struct device *dev)
 	ctrl = pci_read_config16(dev, PCI_BRIDGE_CONTROL);
 	ctrl |= dev->link[0].bridge_ctrl;
 	ctrl |= (PCI_BRIDGE_CTL_PARITY + PCI_BRIDGE_CTL_SERR); /* error check */
-	printk_debug("%s bridge ctrl <- %04x\n", dev_path(dev), ctrl);
+	printk(BIOS_DEBUG, "%s bridge ctrl <- %04x\n", dev_path(dev), ctrl);
 	pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl);
 
 	/* This is the reason we need our own pci_bus_enable_resources */
@@ -102,7 +102,7 @@ static void ich_pci_bus_enable_resources(struct device *dev)
 	enable_childrens_resources(dev);
 }
 
-static void set_subsystem(device_t dev, unsigned vendor, unsigned device)
+static void set_subsystem(struct device * dev, u16 vendor, u16 device)
 {
 #if 0
 	/* Currently disabled because it causes a "BAR 9" memory resource
@@ -110,7 +110,7 @@ static void set_subsystem(device_t dev, unsigned vendor, unsigned device)
 	 */
 	u32 pci_id;
 
-	printk_debug("Setting PCI bridge subsystem ID\n");
+	printk(BIOS_DEBUG, "Setting PCI bridge subsystem ID\n");
 	pci_id = pci_read_config32(dev, 0);
 	pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, pci_id );
 #endif
diff --git a/southbridge/intel/i82801gx/pcie.c b/southbridge/intel/i82801gx/pcie.c
index 822ed15d1cbc..c8cac9902e57 100644
--- a/southbridge/intel/i82801gx/pcie.c
+++ b/southbridge/intel/i82801gx/pcie.c
@@ -67,7 +67,7 @@ static void pci_init(struct device *dev)
 	printk(BIOS_DEBUG, "    PMLU32 = 0x%08x\n", reg32);
 }
 
-static void set_subsystem(device_t dev, unsigned vendor, unsigned device)
+static void set_subsystem(struct device * dev, u16 vendor, u16 device)
 {
 	u32 pci_id;
 
diff --git a/southbridge/intel/i82801gx/sata.c b/southbridge/intel/i82801gx/sata.c
index 106ddaf5ede7..2663a2de375a 100644
--- a/southbridge/intel/i82801gx/sata.c
+++ b/southbridge/intel/i82801gx/sata.c
@@ -29,7 +29,7 @@
 #include <config.h>
 #include "i82801gx.h"
 
-typedef struct southbridge_intel_i82801gx_config config_t;
+typedef struct southbridge_intel_i82801gx_sata_config config_t;
 
 static void sata_init(struct device *dev)
 {
@@ -139,16 +139,7 @@ static void sata_init(struct device *dev)
 	pci_write_config32(dev, 0xa4, reg32);
 	pci_write_config8(dev, 0xa0, 0x00);
 }
-
-static struct device_operations sata_ops = {
-	.read_resources		= pci_dev_read_resources,
-	.set_resources		= pci_dev_set_resources,
-	.enable_resources	= ,
-	.init			= ,
-	.scan_bus		= 0,
-	.enable			= i82801gx_enable,
-};
-
+void i82801gx_enable(struct device * dev);
 /* Desktop Non-AHCI and Non-RAID Mode */
 /* 82801GB/GR/GDH (ICH7/ICH7R/ICH7DH) */
 struct device_operations i82801gx_sata_normal_driver = {
diff --git a/southbridge/intel/i82801gx/sata.dts b/southbridge/intel/i82801gx/sata.dts
index 571db8371535..7d780f548167 100644
--- a/southbridge/intel/i82801gx/sata.dts
+++ b/southbridge/intel/i82801gx/sata.dts
@@ -20,4 +20,9 @@
 
 {
 	device_operations = "i82801gx_sata_normal_driver";
+	ide_legacy_combined = "0";
+	ide_enable_primary = "0";
+	ide_enable_secondary = "0";
+	sata_ahci = "0";
 };
+
diff --git a/southbridge/intel/i82801gx/smbus.c b/southbridge/intel/i82801gx/smbus.c
index be2f08248309..ea99d78c8b18 100644
--- a/southbridge/intel/i82801gx/smbus.c
+++ b/southbridge/intel/i82801gx/smbus.c
@@ -25,12 +25,13 @@
 #include <msr.h>
 #include <legacy.h>
 #include <device/pci_ids.h>
+#include <device/smbus.h>
 #include <statictree.h>
 #include <config.h>
 #include "i82801gx.h"
-#include "i82801_smbus.h"
+#include "i82801gx_smbus.h"
 
-int smbus_read_byte(struct bus *bus, device_t dev, u8 address)
+int smbus_read_byte(struct bus *bus, struct device * dev, u8 address)
 {
 	u16 device;
 	struct resource *res;
@@ -44,6 +45,7 @@ int smbus_read_byte(struct bus *bus, device_t dev, u8 address)
 static struct smbus_bus_operations lops_smbus_bus = {
 	.read_byte	= smbus_read_byte,
 };
+void i82801gx_enable(struct device * dev)
 
 /* 82801GB/GR/GDH/GBM/GHM/GU (ICH7/ICH7R/ICH7DH/ICH7-M/ICH7-M DH/ICH7-U) */
 struct device_operations i82801gx_smbus = {