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| author | Arthur Heymans <arthur@aheymans.xyz> | 2022-11-17 12:08:31 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-11-24 15:15:41 +0000 |
| commit | 5e3798ca484b48843662c84967cc6ac88fa789dd (patch) | |
| tree | a8c972d01ac40965d6009db37d6e4ca40640da8c /src/arch/arm/memset.S | |
| parent | a9921bcadb7e8c179c656b7b115bce37cb45f0eb (diff) | |
| download | coreboot-5e3798ca484b48843662c84967cc6ac88fa789dd.tar.gz coreboot-5e3798ca484b48843662c84967cc6ac88fa789dd.tar.bz2 coreboot-5e3798ca484b48843662c84967cc6ac88fa789dd.zip | |
arch/arm: Use unified assembly syntax
Taken from Linux which also updated these files.
Clang only works with this syntax, so this fixes builds for arm.
TESTED on qemu vexpress-a9 and verstage on google/vilboz with
BUILD_TIMELESS=1, binaries remain the same.
Change-Id: Ia320dc2c460c99d934b8f17dee7748a9def4e750
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63058
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/arm/memset.S')
| -rw-r--r-- | src/arch/arm/memset.S | 40 |
1 files changed, 21 insertions, 19 deletions
diff --git a/src/arch/arm/memset.S b/src/arch/arm/memset.S index 5da53539542d..4a29646c0226 100644 --- a/src/arch/arm/memset.S +++ b/src/arch/arm/memset.S @@ -8,6 +8,8 @@ #include <arch/asm.h> #include "asmlib.h" +.syntax unified + ENTRY(memset) ands r3, r0, #3 @ 1 unaligned? mov ip, r0 @ preserve r0 as return value @@ -31,20 +33,20 @@ ENTRY(memset) mov lr, r1 2: subs r2, r2, #64 - stmgeia ip!, {r1, r3, r8, lr} @ 64 bytes at a time. - stmgeia ip!, {r1, r3, r8, lr} - stmgeia ip!, {r1, r3, r8, lr} - stmgeia ip!, {r1, r3, r8, lr} + stmiage ip!, {r1, r3, r8, lr} @ 64 bytes at a time. + stmiage ip!, {r1, r3, r8, lr} + stmiage ip!, {r1, r3, r8, lr} + stmiage ip!, {r1, r3, r8, lr} bgt 2b - ldmeqfd sp!, {r8, pc} @ Now <64 bytes to go. + ldmfdeq sp!, {r8, pc} @ Now <64 bytes to go. /* * No need to correct the count; we're only testing bits from now on */ tst r2, #32 - stmneia ip!, {r1, r3, r8, lr} - stmneia ip!, {r1, r3, r8, lr} + stmiane ip!, {r1, r3, r8, lr} + stmiane ip!, {r1, r3, r8, lr} tst r2, #16 - stmneia ip!, {r1, r3, r8, lr} + stmiane ip!, {r1, r3, r8, lr} ldmfd sp!, {r8, lr} #else @@ -77,21 +79,21 @@ ENTRY(memset) strne r1, [ip], #4 3: subs r2, r2, #64 - stmgeia ip!, {r1, r3-r8, lr} - stmgeia ip!, {r1, r3-r8, lr} + stmiage ip!, {r1, r3-r8, lr} + stmiage ip!, {r1, r3-r8, lr} bgt 3b - ldmeqfd sp!, {r4-r8, pc} + ldmfdeq sp!, {r4-r8, pc} tst r2, #32 - stmneia ip!, {r1, r3-r8, lr} + stmiane ip!, {r1, r3-r8, lr} tst r2, #16 - stmneia ip!, {r4-r7} + stmiane ip!, {r4-r7} ldmfd sp!, {r4-r8, lr} #endif 4: tst r2, #8 - stmneia ip!, {r1, r3} + stmiane ip!, {r1, r3} tst r2, #4 strne r1, [ip], #4 /* @@ -99,17 +101,17 @@ ENTRY(memset) * may have an unaligned pointer as well. */ 5: tst r2, #2 - strneb r1, [ip], #1 - strneb r1, [ip], #1 + strbne r1, [ip], #1 + strbne r1, [ip], #1 tst r2, #1 - strneb r1, [ip], #1 + strbne r1, [ip], #1 mov pc, lr 6: subs r2, r2, #4 @ 1 do we have enough blt 5b @ 1 bytes to align with? cmp r3, #2 @ 1 - strltb r1, [ip], #1 @ 1 - strleb r1, [ip], #1 @ 1 + strblt r1, [ip], #1 @ 1 + strble r1, [ip], #1 @ 1 strb r1, [ip], #1 @ 1 add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3)) b 1b |