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| author | Elyes Haouas <ehaouas@noos.fr> | 2022-10-13 12:07:24 +0200 |
|---|---|---|
| committer | Felix Singer <felixsinger@posteo.net> | 2022-12-25 15:09:48 +0000 |
| commit | 2179c7fdb7c48e7cc3009c00cbd107267e0d7903 (patch) | |
| tree | 4a56f9af8800c381504b536438742fe6a1f5bc7e /src/arch/riscv | |
| parent | 9523e3b7905a3c20214b8af4bacd50abe178eded (diff) | |
| download | coreboot-2179c7fdb7c48e7cc3009c00cbd107267e0d7903.tar.gz coreboot-2179c7fdb7c48e7cc3009c00cbd107267e0d7903.tar.bz2 coreboot-2179c7fdb7c48e7cc3009c00cbd107267e0d7903.zip | |
arch/riscv: Use 'enum cb_err'
Change-Id: I5a589a43b1e92cca6b531ca161174eefb5592569
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68371
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Diffstat (limited to 'src/arch/riscv')
| -rw-r--r-- | src/arch/riscv/misaligned.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/arch/riscv/misaligned.c b/src/arch/riscv/misaligned.c index a17b7dd45407..9f144b89bcfd 100644 --- a/src/arch/riscv/misaligned.c +++ b/src/arch/riscv/misaligned.c @@ -1,9 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <stdint.h> #include <vm.h> #include <arch/exception.h> #include <commonlib/helpers.h> +#include <types.h> /* these functions are defined in src/arch/riscv/fp_asm.S */ #if defined(__riscv_flen) @@ -131,18 +131,18 @@ static struct memory_instruction_info *match_instruction(uintptr_t insn) return NULL; } -static int fetch_16bit_instruction(uintptr_t vaddr, uintptr_t *insn, int *size) +static enum cb_err fetch_16bit_instruction(uintptr_t vaddr, uintptr_t *insn, int *size) { uint16_t ins = mprv_read_mxr_u16((uint16_t *)vaddr); if (EXTRACT_FIELD(ins, 0x3) != 3) { *insn = ins; *size = 2; - return 0; + return CB_SUCCESS; } - return -1; + return CB_ERR; } -static int fetch_32bit_instruction(uintptr_t vaddr, uintptr_t *insn, int *size) +static enum cb_err fetch_32bit_instruction(uintptr_t vaddr, uintptr_t *insn, int *size) { uint32_t l = (uint32_t)mprv_read_mxr_u16((uint16_t *)vaddr + 0); uint32_t h = (uint32_t)mprv_read_mxr_u16((uint16_t *)vaddr + 1); @@ -151,9 +151,9 @@ static int fetch_32bit_instruction(uintptr_t vaddr, uintptr_t *insn, int *size) (EXTRACT_FIELD(ins, 0x1c) != 0x7)) { *insn = ins; *size = 4; - return 0; + return CB_SUCCESS; } - return -1; + return CB_ERR; } void handle_misaligned(trapframe *tf) |