summaryrefslogtreecommitdiffstats
path: root/src/arch/riscv
diff options
context:
space:
mode:
authorPatrick Georgi <pgeorgi@google.com>2020-05-10 16:41:01 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-05-11 17:11:40 +0000
commit6b5bc77c9b22c398262ff3f4dae3e14904c57366 (patch)
treeab40c703d92f906f8604635f091f809b59233efa /src/arch/riscv
parenta83c6bc907b8ef77935ba62789bc4ed60716986d (diff)
downloadcoreboot-6b5bc77c9b22c398262ff3f4dae3e14904c57366.tar.gz
coreboot-6b5bc77c9b22c398262ff3f4dae3e14904c57366.tar.bz2
coreboot-6b5bc77c9b22c398262ff3f4dae3e14904c57366.zip
treewide: Remove "this file is part of" lines
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/riscv')
-rw-r--r--src/arch/riscv/Makefile.inc1
-rw-r--r--src/arch/riscv/arch_timer.c1
-rw-r--r--src/arch/riscv/boot.c1
-rw-r--r--src/arch/riscv/bootblock.S1
-rw-r--r--src/arch/riscv/fit_payload.c1
-rw-r--r--src/arch/riscv/fp_asm.S1
-rw-r--r--src/arch/riscv/include/arch/barrier.h1
-rw-r--r--src/arch/riscv/include/arch/boot.h1
-rw-r--r--src/arch/riscv/include/arch/byteorder.h1
-rw-r--r--src/arch/riscv/include/arch/cache.h1
-rw-r--r--src/arch/riscv/include/arch/cbconfig.h1
-rw-r--r--src/arch/riscv/include/arch/cpu.h1
-rw-r--r--src/arch/riscv/include/arch/encoding.h1
-rw-r--r--src/arch/riscv/include/arch/errno.h1
-rw-r--r--src/arch/riscv/include/arch/exception.h1
-rw-r--r--src/arch/riscv/include/arch/header.ld1
-rw-r--r--src/arch/riscv/include/arch/hlt.h1
-rw-r--r--src/arch/riscv/include/arch/memlayout.h1
-rw-r--r--src/arch/riscv/include/arch/mmio.h1
-rw-r--r--src/arch/riscv/include/arch/pmp.h1
-rw-r--r--src/arch/riscv/include/arch/smp/atomic.h1
-rw-r--r--src/arch/riscv/include/arch/smp/smp.h1
-rw-r--r--src/arch/riscv/include/arch/smp/spinlock.h1
-rw-r--r--src/arch/riscv/include/arch/stages.h1
-rw-r--r--src/arch/riscv/include/bits.h1
-rw-r--r--src/arch/riscv/include/mcall.h1
-rw-r--r--src/arch/riscv/include/sbi.h1
-rw-r--r--src/arch/riscv/include/vm.h1
-rw-r--r--src/arch/riscv/mcall.c1
-rw-r--r--src/arch/riscv/misaligned.c1
-rw-r--r--src/arch/riscv/misc.c1
-rw-r--r--src/arch/riscv/opensbi.c1
-rw-r--r--src/arch/riscv/payload.c1
-rw-r--r--src/arch/riscv/pmp.c1
-rw-r--r--src/arch/riscv/ramstage.S1
-rw-r--r--src/arch/riscv/romstage.c1
-rw-r--r--src/arch/riscv/sbi.c1
-rw-r--r--src/arch/riscv/smp.c1
-rw-r--r--src/arch/riscv/tables.c1
-rw-r--r--src/arch/riscv/trap_handler.c1
-rw-r--r--src/arch/riscv/trap_util.S1
-rw-r--r--src/arch/riscv/virtual_memory.c1
42 files changed, 0 insertions, 42 deletions
diff --git a/src/arch/riscv/Makefile.inc b/src/arch/riscv/Makefile.inc
index 17f225a52345..3c5d7e7cfa8e 100644
--- a/src/arch/riscv/Makefile.inc
+++ b/src/arch/riscv/Makefile.inc
@@ -1,7 +1,6 @@
################################################################################
##
## SPDX-License-Identifier: GPL-2.0-only
-## This file is part of the coreboot project.
##
################################################################################
diff --git a/src/arch/riscv/arch_timer.c b/src/arch/riscv/arch_timer.c
index af5db5ed6102..7e9072b6cdc4 100644
--- a/src/arch/riscv/arch_timer.c
+++ b/src/arch/riscv/arch_timer.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <device/mmio.h>
#include <arch/encoding.h>
diff --git a/src/arch/riscv/boot.c b/src/arch/riscv/boot.c
index 0e6e2233f2f0..7cb0a3636f1a 100644
--- a/src/arch/riscv/boot.c
+++ b/src/arch/riscv/boot.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <program_loading.h>
#include <vm.h>
diff --git a/src/arch/riscv/bootblock.S b/src/arch/riscv/bootblock.S
index b25a54194945..12fda328f6c8 100644
--- a/src/arch/riscv/bootblock.S
+++ b/src/arch/riscv/bootblock.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
/*
* Early initialization code for RISC-V
*/
diff --git a/src/arch/riscv/fit_payload.c b/src/arch/riscv/fit_payload.c
index 58d40f395931..32090889fd73 100644
--- a/src/arch/riscv/fit_payload.c
+++ b/src/arch/riscv/fit_payload.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
-/* This file is part of the coreboot project. */
#include <cbfs.h>
#include <commonlib/bsd/compression.h>
diff --git a/src/arch/riscv/fp_asm.S b/src/arch/riscv/fp_asm.S
index 5961047aa9c0..4bc86cfc33d1 100644
--- a/src/arch/riscv/fp_asm.S
+++ b/src/arch/riscv/fp_asm.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
/*
* This file define some function used to swap value between memory
diff --git a/src/arch/riscv/include/arch/barrier.h b/src/arch/riscv/include/arch/barrier.h
index d5e61e8b4799..798f879a32dc 100644
--- a/src/arch/riscv/include/arch/barrier.h
+++ b/src/arch/riscv/include/arch/barrier.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-3-Clause */
-/* This file is part of the coreboot project. */
#ifndef __ARCH_BARRIER_H_
#define __ARCH_BARRIER_H__
diff --git a/src/arch/riscv/include/arch/boot.h b/src/arch/riscv/include/arch/boot.h
index be1e6f1ce391..097022e2a7d6 100644
--- a/src/arch/riscv/include/arch/boot.h
+++ b/src/arch/riscv/include/arch/boot.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef ARCH_RISCV_INCLUDE_ARCH_BOOT_H
#define ARCH_RISCV_INCLUDE_ARCH_BOOT_H
diff --git a/src/arch/riscv/include/arch/byteorder.h b/src/arch/riscv/include/arch/byteorder.h
index 096ef7585ac0..248535804414 100644
--- a/src/arch/riscv/include/arch/byteorder.h
+++ b/src/arch/riscv/include/arch/byteorder.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef _BYTEORDER_H
#define _BYTEORDER_H
diff --git a/src/arch/riscv/include/arch/cache.h b/src/arch/riscv/include/arch/cache.h
index b42ad95ea00f..0f3bc8be1fbf 100644
--- a/src/arch/riscv/include/arch/cache.h
+++ b/src/arch/riscv/include/arch/cache.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-3-Clause */
-/* This file is part of the coreboot project. */
#ifndef ARCH_CACHE_H
#define ARCH_CACHE_H
diff --git a/src/arch/riscv/include/arch/cbconfig.h b/src/arch/riscv/include/arch/cbconfig.h
index fedc8bdcc661..27812dec118e 100644
--- a/src/arch/riscv/include/arch/cbconfig.h
+++ b/src/arch/riscv/include/arch/cbconfig.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef _ARCH_CBCONFIG_H_
#define _ARCH_CBCONFIG_H_
diff --git a/src/arch/riscv/include/arch/cpu.h b/src/arch/riscv/include/arch/cpu.h
index e249aa396403..d623e8424148 100644
--- a/src/arch/riscv/include/arch/cpu.h
+++ b/src/arch/riscv/include/arch/cpu.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef __ARCH_CPU_H__
#define __ARCH_CPU_H__
diff --git a/src/arch/riscv/include/arch/encoding.h b/src/arch/riscv/include/arch/encoding.h
index 8aae565ba08a..4f01e5ce9776 100644
--- a/src/arch/riscv/include/arch/encoding.h
+++ b/src/arch/riscv/include/arch/encoding.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-4-Clause-UC */
-/* This file is part of the coreboot project. */
#ifndef RISCV_CSR_ENCODING_H
#define RISCV_CSR_ENCODING_H
diff --git a/src/arch/riscv/include/arch/errno.h b/src/arch/riscv/include/arch/errno.h
index 1aa8eebb8720..c3edc15e43db 100644
--- a/src/arch/riscv/include/arch/errno.h
+++ b/src/arch/riscv/include/arch/errno.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-4-Clause-UC */
-/* This file is part of the coreboot project. */
#ifndef _RISCV_ERRNO_BASE_H
#define _RISCV_ERRNO_BASE_H
diff --git a/src/arch/riscv/include/arch/exception.h b/src/arch/riscv/include/arch/exception.h
index 3e8da6c0f482..208cc81e2419 100644
--- a/src/arch/riscv/include/arch/exception.h
+++ b/src/arch/riscv/include/arch/exception.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-3-Clause */
-/* This file is part of the coreboot project. */
#ifndef _ARCH_EXCEPTION_H
#define _ARCH_EXCEPTION_H
diff --git a/src/arch/riscv/include/arch/header.ld b/src/arch/riscv/include/arch/header.ld
index 1168b37b8c9d..d8147728ee9e 100644
--- a/src/arch/riscv/include/arch/header.ld
+++ b/src/arch/riscv/include/arch/header.ld
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <rules.h>
diff --git a/src/arch/riscv/include/arch/hlt.h b/src/arch/riscv/include/arch/hlt.h
index 4020defe30b3..bdefbb5de72d 100644
--- a/src/arch/riscv/include/arch/hlt.h
+++ b/src/arch/riscv/include/arch/hlt.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
static __always_inline void hlt(void)
{
diff --git a/src/arch/riscv/include/arch/memlayout.h b/src/arch/riscv/include/arch/memlayout.h
index fcbe6a70426b..3a77bd527b4e 100644
--- a/src/arch/riscv/include/arch/memlayout.h
+++ b/src/arch/riscv/include/arch/memlayout.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
/* This file contains macro definitions for memlayout.ld linker scripts. */
diff --git a/src/arch/riscv/include/arch/mmio.h b/src/arch/riscv/include/arch/mmio.h
index e66629e4ada5..e2dbce4ab6ab 100644
--- a/src/arch/riscv/include/arch/mmio.h
+++ b/src/arch/riscv/include/arch/mmio.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef __ARCH_MMIO_H__
#define __ARCH_MMIO_H__
diff --git a/src/arch/riscv/include/arch/pmp.h b/src/arch/riscv/include/arch/pmp.h
index 8335349e4ff9..663e50a97f7d 100644
--- a/src/arch/riscv/include/arch/pmp.h
+++ b/src/arch/riscv/include/arch/pmp.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef __RISCV_PMP_H__
#define __RISCV_PMP_H__
diff --git a/src/arch/riscv/include/arch/smp/atomic.h b/src/arch/riscv/include/arch/smp/atomic.h
index 1ac6e79a9ada..ba20efbc64b8 100644
--- a/src/arch/riscv/include/arch/smp/atomic.h
+++ b/src/arch/riscv/include/arch/smp/atomic.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-4-Clause-UC */
-/* This file is part of the coreboot project. */
#ifndef _RISCV_ATOMIC_H
#define _RISCV_ATOMIC_H
diff --git a/src/arch/riscv/include/arch/smp/smp.h b/src/arch/riscv/include/arch/smp/smp.h
index 353f8f5f36a2..9d3ae5f92b9d 100644
--- a/src/arch/riscv/include/arch/smp/smp.h
+++ b/src/arch/riscv/include/arch/smp/smp.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef _RISCV_SMP_H
#define _RISCV_SMP_H
diff --git a/src/arch/riscv/include/arch/smp/spinlock.h b/src/arch/riscv/include/arch/smp/spinlock.h
index c9c2e6c02b48..b316ff078d72 100644
--- a/src/arch/riscv/include/arch/smp/spinlock.h
+++ b/src/arch/riscv/include/arch/smp/spinlock.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef ARCH_SMP_SPINLOCK_H
#define ARCH_SMP_SPINLOCK_H
diff --git a/src/arch/riscv/include/arch/stages.h b/src/arch/riscv/include/arch/stages.h
index 2d8166894f42..f9de2b550203 100644
--- a/src/arch/riscv/include/arch/stages.h
+++ b/src/arch/riscv/include/arch/stages.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef __ARCH_STAGES_H
#define __ARCH_STAGES_H
diff --git a/src/arch/riscv/include/bits.h b/src/arch/riscv/include/bits.h
index 8afb14a5d79e..26f8663cb363 100644
--- a/src/arch/riscv/include/bits.h
+++ b/src/arch/riscv/include/bits.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-4-Clause-UC */
-/* This file is part of the coreboot project. */
#ifndef _BITS_H
#define _BITS_H
diff --git a/src/arch/riscv/include/mcall.h b/src/arch/riscv/include/mcall.h
index 44b2d2733488..803ee3e66b09 100644
--- a/src/arch/riscv/include/mcall.h
+++ b/src/arch/riscv/include/mcall.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef _MCALL_H
#define _MCALL_H
diff --git a/src/arch/riscv/include/sbi.h b/src/arch/riscv/include/sbi.h
index 2905310b8814..04b0ac7c3f8d 100644
--- a/src/arch/riscv/include/sbi.h
+++ b/src/arch/riscv/include/sbi.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef RISCV_SBI_H
#define RISCV_SBI_H
diff --git a/src/arch/riscv/include/vm.h b/src/arch/riscv/include/vm.h
index 5c2b1d4f6a93..5501a0c7103b 100644
--- a/src/arch/riscv/include/vm.h
+++ b/src/arch/riscv/include/vm.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-4-Clause-UC */
-/* This file is part of the coreboot project. */
#ifndef _VM_H
#define _VM_H
diff --git a/src/arch/riscv/mcall.c b/src/arch/riscv/mcall.c
index 8e788a7c7015..7f846bd83e73 100644
--- a/src/arch/riscv/mcall.c
+++ b/src/arch/riscv/mcall.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-4-Clause-UC */
-/* This file is part of the coreboot project. */
#include <mcall.h>
#include <string.h>
diff --git a/src/arch/riscv/misaligned.c b/src/arch/riscv/misaligned.c
index 172b21524c42..eff51fc96e9d 100644
--- a/src/arch/riscv/misaligned.c
+++ b/src/arch/riscv/misaligned.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <stddef.h>
#include <stdint.h>
diff --git a/src/arch/riscv/misc.c b/src/arch/riscv/misc.c
index 71bef1d787e8..9054ffd972e3 100644
--- a/src/arch/riscv/misc.c
+++ b/src/arch/riscv/misc.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <delay.h>
diff --git a/src/arch/riscv/opensbi.c b/src/arch/riscv/opensbi.c
index d9fdc2fb8eb9..e719560db3e6 100644
--- a/src/arch/riscv/opensbi.c
+++ b/src/arch/riscv/opensbi.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <sbi/fw_dynamic.h>
#include <arch/boot.h>
diff --git a/src/arch/riscv/payload.c b/src/arch/riscv/payload.c
index 715d7f378cf6..3097ad1bf8ba 100644
--- a/src/arch/riscv/payload.c
+++ b/src/arch/riscv/payload.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <program_loading.h>
#include <stdint.h>
diff --git a/src/arch/riscv/pmp.c b/src/arch/riscv/pmp.c
index e707051a852f..ee39ac44dc14 100644
--- a/src/arch/riscv/pmp.c
+++ b/src/arch/riscv/pmp.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <arch/encoding.h>
#include <stdint.h>
diff --git a/src/arch/riscv/ramstage.S b/src/arch/riscv/ramstage.S
index 676c59ba1f1e..921c46d8a579 100644
--- a/src/arch/riscv/ramstage.S
+++ b/src/arch/riscv/ramstage.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <arch/encoding.h>
#include <bits.h>
diff --git a/src/arch/riscv/romstage.c b/src/arch/riscv/romstage.c
index 0991c681b432..5146b0e55f66 100644
--- a/src/arch/riscv/romstage.c
+++ b/src/arch/riscv/romstage.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
/*
* Entry points must be placed at the location the previous stage jumps
diff --git a/src/arch/riscv/sbi.c b/src/arch/riscv/sbi.c
index bbde935ea98a..38fc05e21052 100644
--- a/src/arch/riscv/sbi.c
+++ b/src/arch/riscv/sbi.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <mcall.h>
#include <stdint.h>
diff --git a/src/arch/riscv/smp.c b/src/arch/riscv/smp.c
index eb435d85a4bf..b3e13ff9fb3b 100644
--- a/src/arch/riscv/smp.c
+++ b/src/arch/riscv/smp.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <stddef.h>
#include <arch/encoding.h>
diff --git a/src/arch/riscv/tables.c b/src/arch/riscv/tables.c
index 8a60b43e6271..4935ef5ecef4 100644
--- a/src/arch/riscv/tables.c
+++ b/src/arch/riscv/tables.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <bootmem.h>
#include <boot/tables.h>
diff --git a/src/arch/riscv/trap_handler.c b/src/arch/riscv/trap_handler.c
index 91db11479bf7..32b2c409f78d 100644
--- a/src/arch/riscv/trap_handler.c
+++ b/src/arch/riscv/trap_handler.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
/*
* Early initialization code for riscv
*/
diff --git a/src/arch/riscv/trap_util.S b/src/arch/riscv/trap_util.S
index 0e7d53bfcf70..f1c4c4d3b8ff 100644
--- a/src/arch/riscv/trap_util.S
+++ b/src/arch/riscv/trap_util.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
/*
* Early initialization code for riscv
*/
diff --git a/src/arch/riscv/virtual_memory.c b/src/arch/riscv/virtual_memory.c
index 431f711ba38f..467b93de163c 100644
--- a/src/arch/riscv/virtual_memory.c
+++ b/src/arch/riscv/virtual_memory.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
/*
* Early initialization code for riscv virtual memory
*/