diff options
| author | Raul E Rangel <rrangel@chromium.org> | 2021-07-21 14:34:00 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-07-26 07:30:48 +0000 |
| commit | ca0606e04fd6e6f9ed2e11d31155a17bed3d3a12 (patch) | |
| tree | 75d71fe6d79c4840830150bb78bd7d4b8317b963 /src/arch/x86/assembly_entry.S | |
| parent | e279d90d4de18a0333fc7650710b0dba7e2fcd7f (diff) | |
| download | coreboot-ca0606e04fd6e6f9ed2e11d31155a17bed3d3a12.tar.gz coreboot-ca0606e04fd6e6f9ed2e11d31155a17bed3d3a12.tar.bz2 coreboot-ca0606e04fd6e6f9ed2e11d31155a17bed3d3a12.zip | |
arch/x86,lib/thread: Enable thread support in romstage
This change does the following:
* Pushes the cpu_info struct into the top of the stack (just like
c_start.S). This is required so the cpu_info function works correctly.
* Adds the thread.c to the romstage build.
I only enabled this for romstage since I haven't done any tests in other
stages, but in theory it should work for other stages.
BUG=b:179699789
TEST=Boot guybrush with threads enabled in romstage
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I8e32e1c54dea0d0c85dd6d6753147099aa54b9b5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56494
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/arch/x86/assembly_entry.S')
| -rw-r--r-- | src/arch/x86/assembly_entry.S | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/arch/x86/assembly_entry.S b/src/arch/x86/assembly_entry.S index 6e730273f84f..b0e15dc7003b 100644 --- a/src/arch/x86/assembly_entry.S +++ b/src/arch/x86/assembly_entry.S @@ -35,6 +35,14 @@ _start: /* reset stack pointer to CAR/EARLYRAM stack */ mov $_STACK_TOP, %esp +#if CONFIG(COOP_MULTITASKING) + /* Push the thread pointer. */ + push $0 +#endif + /* Push the CPU index and struct CPU */ + push $0 + push $0 + /* clear .bss section as it is not shared */ cld xor %eax, %eax |