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authorArthur Heymans <arthur@aheymans.xyz>2021-05-29 08:10:49 +0200
committerFelix Held <felix-coreboot@felixheld.de>2023-11-09 13:20:18 +0000
commita2bc2540c2d004b475b401ccf0b162c2452857bb (patch)
tree902284670b43d9e06d7dccc64dbeec24073fca4e /src/arch/x86
parent4ce52f622ed7fbac4bf5545fd7d39256203cdefe (diff)
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Allow to build romstage sources inside the bootblock
Having a separate romstage is only desirable: - with advanced setups like vboot or normal/fallback - boot medium is slow at startup (some ARM SOCs) - bootblock is limited in size (Intel APL 32K) When this is not the case there is no need for the extra complexity that romstage brings. Including the romstage sources inside the bootblock substantially reduces the total code footprint. Often the resulting code is 10-20k smaller. This is controlled via a Kconfig option. TESTED: works on qemu x86, arm and aarch64 with and without VBOOT. Change-Id: Id68390edc1ba228b121cca89b80c64a92553e284 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55068 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/arch/x86')
-rw-r--r--src/arch/x86/Makefile.inc6
-rw-r--r--src/arch/x86/assembly_entry.S2
-rw-r--r--src/arch/x86/car.ld4
-rw-r--r--src/arch/x86/memcpy.c2
-rw-r--r--src/arch/x86/memlayout.ld2
-rw-r--r--src/arch/x86/memmove_32.c2
-rw-r--r--src/arch/x86/memset.c2
7 files changed, 10 insertions, 10 deletions
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index 384eacd00d53..75b9d3db77b6 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -161,12 +161,12 @@ endif # CONFIG_ARCH_VERSTAGE_X86_32 / CONFIG_ARCH_VERSTAGE_X86_64
ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32)$(CONFIG_ARCH_ROMSTAGE_X86_64),y)
-romstage-y += assembly_entry.S
-romstage-y += romstage.c
+romstage-$(CONFIG_SEPARATE_ROMSTAGE) += assembly_entry.S
+romstage-$(CONFIG_SEPARATE_ROMSTAGE) += romstage.c
romstage-y += boot.c
romstage-$(CONFIG_DEBUG_HW_BREAKPOINTS_IN_ALL_STAGES) += breakpoint.c
romstage-y += post.c
-romstage-y += gdt_init.S
+romstage-$(CONFIG_SEPARATE_ROMSTAGE) += gdt_init.S
romstage-y += cpu_common.c
romstage-$(CONFIG_IDT_IN_EVERY_STAGE) += exception.c
romstage-$(CONFIG_IDT_IN_EVERY_STAGE) += idt.S
diff --git a/src/arch/x86/assembly_entry.S b/src/arch/x86/assembly_entry.S
index 9a9a0465dc1d..7f19e215028b 100644
--- a/src/arch/x86/assembly_entry.S
+++ b/src/arch/x86/assembly_entry.S
@@ -53,7 +53,7 @@ _start:
#endif
#if ((ENV_SEPARATE_VERSTAGE && CONFIG(VERSTAGE_DEBUG_SPINLOOP)) \
- || (ENV_ROMSTAGE && CONFIG(ROMSTAGE_DEBUG_SPINLOOP)))
+ || (ENV_SEPARATE_ROMSTAGE && CONFIG(ROMSTAGE_DEBUG_SPINLOOP)))
/* Wait for a JTAG debugger to break in and set EBX non-zero */
xor %ebx, %ebx
diff --git a/src/arch/x86/car.ld b/src/arch/x86/car.ld
index 2ad1ca2cd820..eb75981bc172 100644
--- a/src/arch/x86/car.ld
+++ b/src/arch/x86/car.ld
@@ -75,7 +75,7 @@
RECORD_SIZE(bss)
#endif
-#if ENV_ROMSTAGE && CONFIG(ASAN_IN_ROMSTAGE)
+#if ENV_SEPARATE_ROMSTAGE && CONFIG(ASAN_IN_ROMSTAGE)
_shadow_size = (_ebss - _car_region_start) >> 3;
REGION(asan_shadow, ., _shadow_size, ARCH_POINTER_ALIGN_SIZE)
#endif
@@ -144,7 +144,7 @@ _bogus = ASSERT((CONFIG_DCACHE_RAM_SIZE == 0) || (SIZEOF(.car.data) <= CONFIG_DC
_bogus2 = ASSERT(_pagetables == ALIGN(_pagetables, 4096), "_pagetables aren't 4KiB aligned");
#endif
_bogus3 = ASSERT(CONFIG_DCACHE_BSP_STACK_SIZE > 0x0, "BSP stack size not configured");
-#if CONFIG(NO_XIP_EARLY_STAGES) && (ENV_ROMSTAGE || ENV_SEPARATE_VERSTAGE)
+#if CONFIG(NO_XIP_EARLY_STAGES) && (ENV_SEPARATE_ROMSTAGE || ENV_SEPARATE_VERSTAGE)
_bogus4 = ASSERT(_eprogram <= _car_region_end, "Stage end too high !");
_bogus5 = ASSERT(_program >= _car_unallocated_start, "Stage start too low!");
#endif
diff --git a/src/arch/x86/memcpy.c b/src/arch/x86/memcpy.c
index d96a93cd9314..9da2a7512e8e 100644
--- a/src/arch/x86/memcpy.c
+++ b/src/arch/x86/memcpy.c
@@ -8,7 +8,7 @@ void *memcpy(void *dest, const void *src, size_t n)
{
unsigned long d0, d1, d2;
-#if (ENV_ROMSTAGE && CONFIG(ASAN_IN_ROMSTAGE)) || \
+#if (ENV_SEPARATE_ROMSTAGE && CONFIG(ASAN_IN_ROMSTAGE)) || \
(ENV_RAMSTAGE && CONFIG(ASAN_IN_RAMSTAGE))
check_memory_region((unsigned long)src, n, false, _RET_IP_);
check_memory_region((unsigned long)dest, n, true, _RET_IP_);
diff --git a/src/arch/x86/memlayout.ld b/src/arch/x86/memlayout.ld
index f448bf89dee2..c199118d2d52 100644
--- a/src/arch/x86/memlayout.ld
+++ b/src/arch/x86/memlayout.ld
@@ -26,7 +26,7 @@ SECTIONS
/* Relocated at runtime in cbmem so the address does not matter. */
RAMSTAGE(64M, 8M)
-#elif ENV_ROMSTAGE
+#elif ENV_SEPARATE_ROMSTAGE
/* The 1M size is not allocated. It's just for basic size checking.
* Link at 32MiB address and rely on cbfstool to relocate to XIP. */
ROMSTAGE(CONFIG_ROMSTAGE_ADDR, 1M)
diff --git a/src/arch/x86/memmove_32.c b/src/arch/x86/memmove_32.c
index 3ec50b26ae15..387a77ed4a64 100644
--- a/src/arch/x86/memmove_32.c
+++ b/src/arch/x86/memmove_32.c
@@ -12,7 +12,7 @@ void *memmove(void *dest, const void *src, size_t n)
int d0, d1, d2, d3, d4, d5;
char *ret = dest;
-#if (ENV_ROMSTAGE && CONFIG(ASAN_IN_ROMSTAGE)) || \
+#if (ENV_SEPARATE_ROMSTAGE && CONFIG(ASAN_IN_ROMSTAGE)) || \
(ENV_RAMSTAGE && CONFIG(ASAN_IN_RAMSTAGE))
check_memory_region((unsigned long)src, n, false, _RET_IP_);
check_memory_region((unsigned long)dest, n, true, _RET_IP_);
diff --git a/src/arch/x86/memset.c b/src/arch/x86/memset.c
index 8a0165ba2977..142dda33d8f6 100644
--- a/src/arch/x86/memset.c
+++ b/src/arch/x86/memset.c
@@ -14,7 +14,7 @@ void *memset(void *dstpp, int c, size_t len)
int d0;
unsigned long int dstp = (unsigned long int)dstpp;
-#if (ENV_ROMSTAGE && CONFIG(ASAN_IN_ROMSTAGE)) || \
+#if (ENV_SEPARATE_ROMSTAGE && CONFIG(ASAN_IN_ROMSTAGE)) || \
(ENV_RAMSTAGE && CONFIG(ASAN_IN_RAMSTAGE))
check_memory_region((unsigned long)dstpp, len, true, _RET_IP_);
#endif