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| author | Felix Held <felix-coreboot@felixheld.de> | 2023-09-12 14:48:38 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-09-29 20:23:50 +0000 |
| commit | 3748fca5955bc975ea426cf9bd9fd8e9278a9752 (patch) | |
| tree | c18ec414e3e11069b362243d1784311ff5dd3e86 /src/arch | |
| parent | ff4d6be9f99c34242140e965f1ed82240d67198c (diff) | |
| download | coreboot-3748fca5955bc975ea426cf9bd9fd8e9278a9752.tar.gz coreboot-3748fca5955bc975ea426cf9bd9fd8e9278a9752.tar.bz2 coreboot-3748fca5955bc975ea426cf9bd9fd8e9278a9752.zip | |
arch/x86/Kconfig: introduce RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT
Since also some AMD CPUs have reserved physical address bits that can't
be used as normal address bits, introduce the
RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT Kconfig option which gets
selected by CPU_INTEL_COMMON, and use the new common option to configure
if the specific SoC/CPU code implements get_reserved_phys_addr_bits or
if the default of this returning 0 is used instead.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I0059e63a160e60ddee280635bba72d363deca7f7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78073
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Diffstat (limited to 'src/arch')
| -rw-r--r-- | src/arch/x86/Kconfig | 10 | ||||
| -rw-r--r-- | src/arch/x86/include/arch/cpu.h | 2 |
2 files changed, 11 insertions, 1 deletions
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 8676fad863de..c97fecb3e4b0 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -92,6 +92,16 @@ config ARCH_X86_64_PGTBL_LOC The position where to place pagetables. Needs to be known at compile time. Must not overlap other files in CBFS. +config RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT + bool + help + On some systems, the upper physical address bits are reserved and + used as a tag which is typically related to a memory encryption + feature. When selecting this option, the SoC code needs to implement + get_reserved_phys_addr_bits so that the common code knows how many of + the most significant physical address bits are reserved and can't be + used as address bits. + # This is an SMP option. It relates to starting up APs. # It is usually set in mainboard/*/Kconfig. # TODO: Improve description. diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h index b24cd23a96bf..2c98d1e98f6f 100644 --- a/src/arch/x86/include/arch/cpu.h +++ b/src/arch/x86/include/arch/cpu.h @@ -316,7 +316,7 @@ size_t get_cache_size(const struct cpu_cache_info *info); */ bool fill_cpu_cache_info(uint8_t level, struct cpu_cache_info *info); -#if CONFIG(CPU_INTEL_COMMON) +#if CONFIG(RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT) unsigned int get_reserved_phys_addr_bits(void); #else /* Default implementation */ |