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| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2021-12-03 17:17:45 +0100 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2024-01-08 19:40:21 +0000 |
| commit | 3d93cd78d8a20ebd7628434e233eedb83b93c54e (patch) | |
| tree | 46852555e23807cc40051c9458fb181d6030efef /src/arch | |
| parent | c4fbc9146dae55763ac0089644138c0ccb370897 (diff) | |
| download | coreboot-3d93cd78d8a20ebd7628434e233eedb83b93c54e.tar.gz coreboot-3d93cd78d8a20ebd7628434e233eedb83b93c54e.tar.bz2 coreboot-3d93cd78d8a20ebd7628434e233eedb83b93c54e.zip | |
src/arch/x86/exit_car: Add proper x86_64 code
Don't truncate upper bits in assembly code and thus allow loading
of postcar stage above 4GiB.
Tested on qemu with cbmem_top set to TOUUD.
Change-Id: I42d1086f1220e44076ccf613244fc3c6d804805b
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Benjamin Doron <benjamin.doron@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79162
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/arch')
| -rw-r--r-- | src/arch/x86/exit_car.S | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/arch/x86/exit_car.S b/src/arch/x86/exit_car.S index c9ff866b1a4d..d435dbe25b71 100644 --- a/src/arch/x86/exit_car.S +++ b/src/arch/x86/exit_car.S @@ -67,8 +67,14 @@ skip_clflush: invd movl $_estack, %esp +#if ENV_X86_64 + /* Align stack to 16 bytes at call instruction. */ + movq $0xfffffffffffffff0, %rax + and %rax, %rsp +#else /* Align stack to 16 bytes at call instruction. */ andl $0xfffffff0, %esp +#endif /* Call this in assembly as some platforms like to mess with the bootflow and call into main directly from chipset_teardown_car. */ |