diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2018-12-28 17:53:36 +0100 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-01-07 10:36:59 +0000 |
| commit | 4cc9b6c78d334bdf3f3e27227eb2ce5bba8b4ef5 (patch) | |
| tree | a0fb84707714be1f2dee2c33a616ef4f8f75fd16 /src/arch | |
| parent | 930d96e1b6acba35a6b0e38b25a6ea03253a3316 (diff) | |
| download | coreboot-4cc9b6c78d334bdf3f3e27227eb2ce5bba8b4ef5.tar.gz coreboot-4cc9b6c78d334bdf3f3e27227eb2ce5bba8b4ef5.tar.bz2 coreboot-4cc9b6c78d334bdf3f3e27227eb2ce5bba8b4ef5.zip | |
usbdebug: Initialize the HW once in CAR stages
The EHCI hardware needs to be initialized only once during CAR stages.
Some exception need to be made when a blob messes with the EHCI
hardware. To achieve this add a fixed location in the car.ld linker
script such that the ehci debug information can be shared across CAR
stages.
Currently this means only romstage and bootblock, but verstage can
also be hooked up later on.
Tested on google/peppy: Both the bootblock and the romstage properly
output console.
Change-Id: I78e20a172fd5cc81f366d580f3cce57b9545d7a2
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30481
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/arch')
| -rw-r--r-- | src/arch/x86/car.ld | 9 | ||||
| -rw-r--r-- | src/arch/x86/include/arch/symbols.h | 2 |
2 files changed, 8 insertions, 3 deletions
diff --git a/src/arch/x86/car.ld b/src/arch/x86/car.ld index 2f0ce50e3ce1..7b10f4313bc8 100644 --- a/src/arch/x86/car.ld +++ b/src/arch/x86/car.ld @@ -40,9 +40,9 @@ _car_stack_end = .; #endif /* The pre-ram cbmem console as well as the timestamp region are fixed - * in size. Therefore place them at the beginning .car.data section - * so that multiple stages (romstage and verstage) have a consistent - * link address of these shared objects. */ + * in size. Therefore place them above the car global section so that + * multiple stages (romstage and verstage) have a consistent + * link address of these shared objects. */ PRERAM_CBMEM_CONSOLE(., CONFIG_PRERAM_CBMEM_CONSOLE_SIZE) #if IS_ENABLED(CONFIG_PAGING_IN_CACHE_AS_RAM) . = ALIGN(32); @@ -66,6 +66,9 @@ . += 256; _car_drivers_storage_end = .; #endif + _car_ehci_dbg_info_start = .; + . += 64; + _car_ehci_dbg_info_end = .; /* _car_global_start and _car_global_end provide symbols to per-stage * variables that are not shared like the timestamp and the pre-ram * cbmem console. This is useful for clearing this area on a per-stage diff --git a/src/arch/x86/include/arch/symbols.h b/src/arch/x86/include/arch/symbols.h index 704e3bbdc38b..9ef6a3b89e88 100644 --- a/src/arch/x86/include/arch/symbols.h +++ b/src/arch/x86/include/arch/symbols.h @@ -34,6 +34,8 @@ extern char _car_stack_start[]; extern char _car_stack_end[]; #define _car_stack_size (_car_stack_end - _car_stack_start) +extern char _car_ehci_dbg_info_start[]; + /* * The _car_relocatable_data_[start|end] symbols cover CAR data which is * relocatable once memory comes online. Variables with CAR_GLOBAL decoration |