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authorHung-Te Lin <hungte@chromium.org>2015-07-13 15:49:57 +0800
committerPatrick Georgi <pgeorgi@google.com>2015-11-19 21:37:47 +0100
commitb15a0d0a6fdd4cce7f6e22570642d863391fc5c6 (patch)
tree6e1981f83013416d03a613aeb2d273d76f9a5e92 /src/commonlib/include/commonlib/coreboot_tables.h
parentbca67fb7dc02a6342f6a19738bfd25da21369057 (diff)
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vendorcode/google/chromeos: Cache VPD data into CBMEM
There are few drawbacks reading VPD from SPI flash in user land, including "lack of firmware level authority" and "slow reading speed". Since for many platforms we are already reading VPD in firmware (for example MAC and serial number), caching the VPD data in CBMEM should will speed up and simplify user land VPD processing without adding performance cost. A new CBMEM ID is added: CBMEM_ID_VPD, referring to a structure containing raw Google VPD 2.0 structure and can be found by the new LB_TAG_VPD in Coreboot tables. BRANCH=smaug BUG=chrome-os-partner:39945 TEST=emerge-smaug coreboot chromeos-bootimage # and boots successfully. [pg: lots of changes to make it work with what happened in upstream since 2013] Change-Id: If8629ac002d52abed7b480d3d06298665613edbf Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 117a9e88912860a22d250ff0e53a7d40237ddd45 Original-Change-Id: Ic79f424a6e3edfb6c5d168b9661d61a56fab295f Original-Signed-off-by: Hung-Te Lin <hungte@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/285031 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/12453 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/commonlib/include/commonlib/coreboot_tables.h')
-rw-r--r--src/commonlib/include/commonlib/coreboot_tables.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/commonlib/include/commonlib/coreboot_tables.h b/src/commonlib/include/commonlib/coreboot_tables.h
index 5e0c87c99df1..32c388b03722 100644
--- a/src/commonlib/include/commonlib/coreboot_tables.h
+++ b/src/commonlib/include/commonlib/coreboot_tables.h
@@ -245,6 +245,7 @@ void lb_ramoops(struct lb_header *header);
#define LB_TAG_MRC_CACHE 0x0018
#define LB_TAG_ACPI_GNVS 0x0024
#define LB_TAG_WIFI_CALIBRATION 0x0027
+#define LB_TAG_VPD 0x002c
struct lb_cbmem_ref {
uint32_t tag;
uint32_t size;