summaryrefslogtreecommitdiffstats
path: root/src/cpu/amd/agesa
diff options
context:
space:
mode:
authorMarshall Dawson <marshalldawson3rd@gmail.com>2018-08-07 07:17:41 -0600
committerMartin Roth <martinroth@google.com>2018-08-08 17:50:02 +0000
commitbddd157ea1508e5d13dd592533bc7607241388fa (patch)
tree9b83984be3dc8e8bfbbb1f4b62bbef2e5ffafbc8 /src/cpu/amd/agesa
parentb388c0e5577eb360ee1df1da7f802b056cec08a9 (diff)
downloadcoreboot-bddd157ea1508e5d13dd592533bc7607241388fa.tar.gz
coreboot-bddd157ea1508e5d13dd592533bc7607241388fa.tar.bz2
coreboot-bddd157ea1508e5d13dd592533bc7607241388fa.zip
cpu/amd: Rename MCA status register
Change the defined name of MCI_STATUS (i.e. MCi_STATUS) to reflect its MC0_STATUS address. Change-Id: I97d2631a186965bb8b18f544ed9648b3a71f5fb0 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/27922 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/cpu/amd/agesa')
-rw-r--r--src/cpu/amd/agesa/family12/model_12_init.c4
-rw-r--r--src/cpu/amd/agesa/family14/model_14_init.c4
-rw-r--r--src/cpu/amd/agesa/family15tn/model_15_init.c2
-rw-r--r--src/cpu/amd/agesa/family16kb/model_16_init.c2
4 files changed, 6 insertions, 6 deletions
diff --git a/src/cpu/amd/agesa/family12/model_12_init.c b/src/cpu/amd/agesa/family12/model_12_init.c
index b4757c8baff1..afdfb3b006dd 100644
--- a/src/cpu/amd/agesa/family12/model_12_init.c
+++ b/src/cpu/amd/agesa/family12/model_12_init.c
@@ -27,7 +27,7 @@
#include <cpu/amd/multicore.h>
#include <cpu/amd/amdfam12.h>
-#define MCI_STATUS 0x401
+#define MC0_STATUS 0x401
static void model_12_init(struct device *dev)
{
@@ -55,7 +55,7 @@ static void model_12_init(struct device *dev)
msr.lo = 0;
msr.hi = 0;
for (i = 0; i < 5; i++) {
- wrmsr(MCI_STATUS + (i * 4), msr);
+ wrmsr(MC0_STATUS + (i * 4), msr);
}
enable_cache();
diff --git a/src/cpu/amd/agesa/family14/model_14_init.c b/src/cpu/amd/agesa/family14/model_14_init.c
index 1271a4eb51b4..257f81fd7afa 100644
--- a/src/cpu/amd/agesa/family14/model_14_init.c
+++ b/src/cpu/amd/agesa/family14/model_14_init.c
@@ -28,7 +28,7 @@
#include <arch/acpi.h>
#include <northbridge/amd/agesa/agesa_helper.h>
-#define MCI_STATUS 0x401
+#define MC0_STATUS 0x401
static void model_14_init(struct device *dev)
{
@@ -78,7 +78,7 @@ static void model_14_init(struct device *dev)
msr.lo = 0;
msr.hi = 0;
for (i = 0; i < 6; i++) {
- wrmsr(MCI_STATUS + (i * 4), msr);
+ wrmsr(MC0_STATUS + (i * 4), msr);
}
/* Enable the local CPU APICs */
diff --git a/src/cpu/amd/agesa/family15tn/model_15_init.c b/src/cpu/amd/agesa/family15tn/model_15_init.c
index 32dcd7b02991..1e0375f23c89 100644
--- a/src/cpu/amd/agesa/family15tn/model_15_init.c
+++ b/src/cpu/amd/agesa/family15tn/model_15_init.c
@@ -75,7 +75,7 @@ static void model_15_init(struct device *dev)
msr.lo = 0;
msr.hi = 0;
for (i = 0; i < 6; i++) {
- wrmsr(MCI_STATUS + (i * 4), msr);
+ wrmsr(MC0_STATUS + (i * 4), msr);
}
/* Enable the local CPU APICs */
diff --git a/src/cpu/amd/agesa/family16kb/model_16_init.c b/src/cpu/amd/agesa/family16kb/model_16_init.c
index 73d91e7edf6e..990979387480 100644
--- a/src/cpu/amd/agesa/family16kb/model_16_init.c
+++ b/src/cpu/amd/agesa/family16kb/model_16_init.c
@@ -73,7 +73,7 @@ static void model_16_init(struct device *dev)
msr.lo = 0;
msr.hi = 0;
for (i = 0; i < 6; i++) {
- wrmsr(MCI_STATUS + (i * 4), msr);
+ wrmsr(MC0_STATUS + (i * 4), msr);
}
/* Enable the local CPU APICs */