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| author | Cliff Huang <cliff.huang@intel.com> | 2023-02-04 21:11:51 -0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-02-09 15:04:34 +0000 |
| commit | 24f3dc8a17240c6869e247c99c94a96af94be0ef (patch) | |
| tree | 5e9179849b8134ca266aa726553f1285af4e1b4a /src/cpu/amd/pi/00730F01/model_16_init.c | |
| parent | 9a5a9635b7af69ac2716498a6b826c7545b27ab6 (diff) | |
| download | coreboot-24f3dc8a17240c6869e247c99c94a96af94be0ef.tar.gz coreboot-24f3dc8a17240c6869e247c99c94a96af94be0ef.tar.bz2 coreboot-24f3dc8a17240c6869e247c99c94a96af94be0ef.zip | |
src/acpi: add function gen: if_lgreater_ and namestr assignment
1. add functions to generate if greater than conditions:
acpigen_write_if_lgreater_op_op:
if (op1 > op2)
acpigen_write_if_lgreater_op_int:
if (op > val)
acpigen_write_if_lgreater_namestr_int:
if (namestr > val)
2. add function to assignal value to a namestr
acpigen_write_store_namestr_to_op:
namestr = val
TEST=Use above functions and check the generated SSDT table after OS
boot.
Signed-off-by: Cliff Huang <cliff.huang@intel.com>
Change-Id: Iffe1b23362a7ab58bdc2aa8daf45cd6f086ee818
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72825
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Reviewed-by: Anil Kumar K <anil.kumar.k@intel.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/amd/pi/00730F01/model_16_init.c')
0 files changed, 0 insertions, 0 deletions