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| author | Angel Pons <th3fanbus@gmail.com> | 2020-08-28 01:57:10 +0200 |
|---|---|---|
| committer | Michael Niewöhner <c0d3z3r0@review.coreboot.org> | 2020-08-30 19:25:43 +0000 |
| commit | 99b2f30bd026bd54ad0f4294d7bbfe0dcc317270 (patch) | |
| tree | 25e319c8a8b0c6ab8410bbbddae9852d40eb7b92 /src/cpu/intel/haswell/finalize.c | |
| parent | 144c5aeca2955e694de600b862d0133606900643 (diff) | |
| download | coreboot-99b2f30bd026bd54ad0f4294d7bbfe0dcc317270.tar.gz coreboot-99b2f30bd026bd54ad0f4294d7bbfe0dcc317270.tar.bz2 coreboot-99b2f30bd026bd54ad0f4294d7bbfe0dcc317270.zip | |
cpu/intel/haswell: Set LT_LOCK_MEMORY MSR on finalize step
This is a security lock and is required for TXT, among other things.
Tested on Asrock B85M Pro4, still boots.
Change-Id: I7b2e8a60ce92cbf523c520be0b365f28413b9624
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44884
Reviewed-by: Michael Niewöhner
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/intel/haswell/finalize.c')
| -rw-r--r-- | src/cpu/intel/haswell/finalize.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/cpu/intel/haswell/finalize.c b/src/cpu/intel/haswell/finalize.c index 1f84b821a906..1832e639672b 100644 --- a/src/cpu/intel/haswell/finalize.c +++ b/src/cpu/intel/haswell/finalize.c @@ -6,4 +6,6 @@ void intel_cpu_haswell_finalize_smm(void) { + /* Lock memory configuration to protect SMM */ + msr_set_bit(MSR_LT_LOCK_MEMORY, 0); } |