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authorArthur Heymans <arthur@aheymans.xyz>2023-08-24 15:12:19 +0200
committerFelix Held <felix-coreboot@felixheld.de>2024-01-31 10:36:39 +0000
commit7fcd4d58ec7ea2da31c258ba9d8601f086d7f8d8 (patch)
tree1bddf10cecf4577fee207e0dbc6f7a5c1b10af13 /src/cpu/intel/haswell/haswell_init.c
parent3138faa7cf1b91e0b56ad0b1be6260cf4251a284 (diff)
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device/device.h: Rename busses for clarity
This renames bus to upstream and link_list to downstream. Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Change-Id: I80a81b6b8606e450ff180add9439481ec28c2420 Reviewed-on: https://review.coreboot.org/c/coreboot/+/78330 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/cpu/intel/haswell/haswell_init.c')
-rw-r--r--src/cpu/intel/haswell/haswell_init.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c
index 83d847cbaec5..86dcbea1772c 100644
--- a/src/cpu/intel/haswell/haswell_init.c
+++ b/src/cpu/intel/haswell/haswell_init.c
@@ -449,7 +449,7 @@ static void configure_c_states(void)
static void configure_thermal_target(struct device *dev)
{
/* Make sure your devicetree has the cpu_cluster below chip cpu/intel/haswell! */
- struct cpu_intel_haswell_config *conf = dev->bus->dev->chip_info;
+ struct cpu_intel_haswell_config *conf = dev->upstream->dev->chip_info;
msr_t msr;
/* Set TCC activation offset if supported */