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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-02 06:14:50 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-07 05:31:35 +0000 |
| commit | f6c20681d1d1fa66212ab58b6dc1e9112fe4651d (patch) | |
| tree | a63e8691f768a193f64a9c5f2ad7ac952a6f876f /src/cpu/intel/model_206ax/Makefile.inc | |
| parent | 0b7cc927b6b629072ba62f6fe3c01fc67ccf4ba1 (diff) | |
| download | coreboot-f6c20681d1d1fa66212ab58b6dc1e9112fe4651d.tar.gz coreboot-f6c20681d1d1fa66212ab58b6dc1e9112fe4651d.tar.bz2 coreboot-f6c20681d1d1fa66212ab58b6dc1e9112fe4651d.zip | |
intel/nehalem,sandybridge: Move stage_cache support function
Let garbage-collection take care of stage_cache_external_region()
if it is no needed and move implementation to a suitable file already
building for needed stages.
Remove aliasing CONFIG_RESERVED_SMM_SIZE as RESERVED_SMM_SIZE and
(unused) aliasing of CONFIG_IED_REGION_SIZE as IED_SIZE.
Change-Id: Idf00ba3180d8c3bc974dd3c5ca5f98a6c08bf34d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34672
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/intel/model_206ax/Makefile.inc')
| -rw-r--r-- | src/cpu/intel/model_206ax/Makefile.inc | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/src/cpu/intel/model_206ax/Makefile.inc b/src/cpu/intel/model_206ax/Makefile.inc index f5de8c38faef..e723d74d786c 100644 --- a/src/cpu/intel/model_206ax/Makefile.inc +++ b/src/cpu/intel/model_206ax/Makefile.inc @@ -24,10 +24,6 @@ smm-y += tsc_freq.c smm-y += finalize.c -romstage-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c -postcar-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c -ramstage-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c - cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-2a-*) cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-3a-*) |