summaryrefslogtreecommitdiffstats
path: root/src/cpu/intel/model_6xx
diff options
context:
space:
mode:
authorUwe Hermann <uwe@hermann-uwe.de>2010-10-07 23:42:17 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-10-07 23:42:17 +0000
commit554c052b48ac0b36503cb41b1c054a5ead7ae4b4 (patch)
tree5320cbf0e5d0355f1f0083690f44b042db0138f7 /src/cpu/intel/model_6xx
parente5b7507882d4ee042d9c4d03e2e763bb49774b43 (diff)
downloadcoreboot-554c052b48ac0b36503cb41b1c054a5ead7ae4b4.tar.gz
coreboot-554c052b48ac0b36503cb41b1c054a5ead7ae4b4.tar.bz2
coreboot-554c052b48ac0b36503cb41b1c054a5ead7ae4b4.zip
Remove some duplicate #include files (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5921 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/intel/model_6xx')
-rw-r--r--src/cpu/intel/model_6xx/model_6xx_init.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/cpu/intel/model_6xx/model_6xx_init.c b/src/cpu/intel/model_6xx/model_6xx_init.c
index 712cd0508dc4..5b8dd3519bce 100644
--- a/src/cpu/intel/model_6xx/model_6xx_init.c
+++ b/src/cpu/intel/model_6xx/model_6xx_init.c
@@ -1,6 +1,5 @@
#include <console/console.h>
#include <device/device.h>
-#include <device/device.h>
#include <device/pci.h>
#include <string.h>
#include <cpu/cpu.h>
@@ -9,7 +8,6 @@
#include <cpu/x86/lapic.h>
#include <cpu/intel/microcode.h>
#include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
static uint32_t microcode_updates[] = {
/* WARNING - Intel has a new data structure that has variable length
@@ -33,7 +31,6 @@ static uint32_t microcode_updates[] = {
0x0, 0x0, 0x0, 0x0,
};
-
static void model_6xx_init(device_t dev)
{
/* Turn on caching if we haven't already */