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| author | Sven Schnelle <svens@stackframe.org> | 2012-06-17 10:32:55 +0200 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2012-07-02 19:39:08 +0200 |
| commit | 042c1461fb777e583e5de48edf9326e47ee5595f (patch) | |
| tree | 489bf29958a39f8a0169e451c7f080e99d25eadd /src/cpu/intel/model_f3x/model_f3x_init.c | |
| parent | 9ed1456eff73d1a268eabb84176dd2a2107bf2d7 (diff) | |
| download | coreboot-042c1461fb777e583e5de48edf9326e47ee5595f.tar.gz coreboot-042c1461fb777e583e5de48edf9326e47ee5595f.tar.bz2 coreboot-042c1461fb777e583e5de48edf9326e47ee5595f.zip | |
Use broadcast SIPI to startup siblings
The current code for initializing AP cpus has several shortcomings:
- it assumes APIC IDs are sequential
- it uses only the BSP for determining the AP count, which is bad if
there's more than one physical CPU, and CPUs are of different type
Note that the new code call cpu->ops->init() in parallel, and therefore
some CPU code needs to be changed to address that. One example are old
Intel HT enabled CPUs which can't do microcode update in parallel.
Change-Id: Ic48a1ebab6a7c52aa76765f497268af09fa38c25
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1139
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/cpu/intel/model_f3x/model_f3x_init.c')
| -rw-r--r-- | src/cpu/intel/model_f3x/model_f3x_init.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/cpu/intel/model_f3x/model_f3x_init.c b/src/cpu/intel/model_f3x/model_f3x_init.c index 2504ba9423d0..dd2a45f3c7ec 100644 --- a/src/cpu/intel/model_f3x/model_f3x_init.c +++ b/src/cpu/intel/model_f3x/model_f3x_init.c @@ -43,9 +43,6 @@ static void model_f3x_init(device_t cpu) /* Enable the local cpu apics */ setup_lapic(); - - /* Start up my cpu siblings */ - intel_sibling_init(cpu); }; static struct device_operations cpu_dev_ops = { |