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| author | Arthur Heymans <arthur@aheymans.xyz> | 2022-11-08 06:49:12 +0100 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2022-11-09 18:05:55 +0000 |
| commit | c8a20b9d3b8939e4b7d259c5857631c9690657de (patch) | |
| tree | 42654e9d79d00b52fff07e05e364c3a7fca133e2 /src/cpu/intel/model_f3x/model_f3x_init.c | |
| parent | 753827ef333cf1d4f08b017f197cc4337e980fd6 (diff) | |
| download | coreboot-c8a20b9d3b8939e4b7d259c5857631c9690657de.tar.gz coreboot-c8a20b9d3b8939e4b7d259c5857631c9690657de.tar.bz2 coreboot-c8a20b9d3b8939e4b7d259c5857631c9690657de.zip | |
cpu/*: Drop PARALLEL_MP leftovers
These symbols and codepaths are unused now so drop them.
Change-Id: I7c46c36390f116f8f8920c06e539075e60c7118c
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69361
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/intel/model_f3x/model_f3x_init.c')
| -rw-r--r-- | src/cpu/intel/model_f3x/model_f3x_init.c | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/src/cpu/intel/model_f3x/model_f3x_init.c b/src/cpu/intel/model_f3x/model_f3x_init.c index 198490ff85bb..bcbfdcf658ed 100644 --- a/src/cpu/intel/model_f3x/model_f3x_init.c +++ b/src/cpu/intel/model_f3x/model_f3x_init.c @@ -2,7 +2,6 @@ #include <cpu/cpu.h> #include <cpu/intel/common/common.h> -#include <cpu/intel/hyperthreading.h> #include <cpu/intel/microcode.h> #include <cpu/x86/cache.h> #include <cpu/x86/mtrr.h> @@ -12,19 +11,6 @@ static void model_f3x_init(struct device *cpu) { /* Turn on caching if we haven't already */ enable_cache(); - - if (!CONFIG(PARALLEL_MP) && !intel_ht_sibling()) { - /* MTRRs are shared between threads */ - x86_setup_mtrrs(); - x86_mtrr_check(); - - /* Update the microcode */ - intel_update_microcode_from_cbfs(); - } - - /* Start up my CPU siblings */ - if (!CONFIG(PARALLEL_MP)) - intel_sibling_init(cpu); }; static struct device_operations cpu_dev_ops = { |