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authorElyes HAOUAS <ehaouas@noos.fr>2022-01-22 19:11:41 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-01-27 14:50:38 +0000
commitec31cf13e2fd2312efac3a93d04c6ad3658ce45c (patch)
tree4a4129ed1e5cb81a5949a30035c555cf6cb12163 /src/cpu/intel/socket_FCBGA559
parent921b99ed4bb988b61ce42d14204564adebaed662 (diff)
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cpu/intel/socket_FCBGA559: Drop 'select SSE'
SSE is already selected by SSE2 through model_106cx/Kconfig Change-Id: I31b8345fdd901e1d05df5fa8351db3255f9cf9cb Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61316 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/cpu/intel/socket_FCBGA559')
-rw-r--r--src/cpu/intel/socket_FCBGA559/Kconfig1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/cpu/intel/socket_FCBGA559/Kconfig b/src/cpu/intel/socket_FCBGA559/Kconfig
index 5105f095e91a..681ca4168283 100644
--- a/src/cpu/intel/socket_FCBGA559/Kconfig
+++ b/src/cpu/intel/socket_FCBGA559/Kconfig
@@ -9,7 +9,6 @@ config SOCKET_SPECIFIC_OPTIONS
def_bool y
select CPU_INTEL_MODEL_106CX
select MMX
- select SSE
select CPU_HAS_L2_ENABLE_MSR
config DCACHE_RAM_BASE