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authorEric Biederman <ebiederm@xmission.com>2004-10-14 19:29:29 +0000
committerEric Biederman <ebiederm@xmission.com>2004-10-14 19:29:29 +0000
commitfcd5ace00b333ce31b11b02a2243dfbf39307f10 (patch)
treed686d752ccea9b185b0008c70d8523749b26e2dd /src/cpu/x86/32bit/entry32.inc
parent98e619b1cefcb9871185f4cc3db85fa430dcdbce (diff)
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- Add new cvs code to cvs
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1657 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/x86/32bit/entry32.inc')
-rw-r--r--src/cpu/x86/32bit/entry32.inc61
1 files changed, 61 insertions, 0 deletions
diff --git a/src/cpu/x86/32bit/entry32.inc b/src/cpu/x86/32bit/entry32.inc
new file mode 100644
index 000000000000..3d30a3f85f27
--- /dev/null
+++ b/src/cpu/x86/32bit/entry32.inc
@@ -0,0 +1,61 @@
+/* For starting linuxBIOS in protected mode */
+
+#include <arch/rom_segs.h>
+
+/* .section ".rom.text" */
+ .code32
+
+ .align 4
+.globl gdtptr
+
+gdt:
+gdtptr:
+ .word gdt_end - gdt -1 /* compute the table limit */
+ .long gdt /* we know the offset */
+ .word 0
+
+/* flat code segment */
+ .word 0xffff, 0x0000
+ .byte 0x00, 0x9b, 0xcf, 0x00
+
+/* flat data segment */
+ .word 0xffff, 0x0000
+ .byte 0x00, 0x93, 0xcf, 0x00
+
+gdt_end:
+
+
+/*
+ * When we come here we are in protected mode. We expand
+ * the stack and copies the data segment from ROM to the
+ * memory.
+ *
+ * After that, we call the chipset bootstrap routine that
+ * does what is left of the chipset initialization.
+ *
+ * NOTE aligned to 4 so that we are sure that the prefetch
+ * cache will be reloaded.
+ */
+ .align 4
+.globl protected_start
+protected_start:
+
+ lgdt %cs:gdtptr
+ ljmp $ROM_CODE_SEG, $__protected_start
+
+__protected_start:
+ /* Save the BIST value */
+ movl %eax, %ebp
+
+ intel_chip_post_macro(0x10) /* post 10 */
+
+ movw $ROM_DATA_SEG, %ax
+ movw %ax, %ds
+ movw %ax, %es
+ movw %ax, %ss
+ movw %ax, %fs
+ movw %ax, %gs
+
+ /* Restore the BIST value to %eax */
+ movl %ebp, %eax
+