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| author | Arthur Heymans <arthur@aheymans.xyz> | 2020-12-01 23:26:45 +0100 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2020-12-04 11:11:26 +0000 |
| commit | 91d5a6cc47d7155150eae5eaf0e4f5035e8df7a5 (patch) | |
| tree | a670216c83f19f89ca91eb34e7a275c39e525016 /src/cpu/x86/lapic/secondary.S | |
| parent | d79e48570c78600313351988ae5940cd4e9aa0e0 (diff) | |
| download | coreboot-91d5a6cc47d7155150eae5eaf0e4f5035e8df7a5.tar.gz coreboot-91d5a6cc47d7155150eae5eaf0e4f5035e8df7a5.tar.bz2 coreboot-91d5a6cc47d7155150eae5eaf0e4f5035e8df7a5.zip | |
cpu/x86/lapic/secondary.S: Adapt for x86_64
Adapt the old lapic init code for x86_64.
Change-Id: I5128ed574323025e927137870fb10b23d06bc01d
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48221
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/cpu/x86/lapic/secondary.S')
| -rw-r--r-- | src/cpu/x86/lapic/secondary.S | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/src/cpu/x86/lapic/secondary.S b/src/cpu/x86/lapic/secondary.S index 8a44112943f5..073e6b485b2e 100644 --- a/src/cpu/x86/lapic/secondary.S +++ b/src/cpu/x86/lapic/secondary.S @@ -33,7 +33,11 @@ _secondary_start: _secondary_gdt_addr: gdtaddr: .word 0 /* the table limit */ +#if ENV_X86_64 + .quad 0 +#else .long 0 /* we know the offset */ +#endif _secondary_start_end: @@ -54,14 +58,23 @@ __ap_protected_start: /* Load the Interrupt descriptor table */ lidt idtarg +#if ENV_X86_64 + /* entry64.inc preserves ebx. */ + #include <cpu/x86/64bit/entry64.inc> + mov secondary_stack, %rsp + andl $0xfffffff0, %esp + mov secondary_cpu_index, %rdi +#else /* Set the stack pointer, and flag that we are done */ xorl %eax, %eax movl secondary_stack, %esp + andl $0xfffffff0, %esp sub $12, %esp /* maintain 16-byte alignment for the call below */ movl secondary_cpu_index, %edi pushl %edi movl %eax, secondary_stack +#endif call secondary_cpu_init 1: hlt |