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| author | Li-Ta Lo <ollie@lanl.gov> | 2004-11-04 18:36:06 +0000 |
|---|---|---|
| committer | Li-Ta Lo <ollie@lanl.gov> | 2004-11-04 18:36:06 +0000 |
| commit | f84926efca2f871fa557cccee36f0f773ec7190b (patch) | |
| tree | 669414cbe6344aa61839f37422c0e163eae4f0fa /src/cpu/x86/lapic/secondary.S | |
| parent | 1995f1af35b53b5c07694df7296f5eb20461b1c6 (diff) | |
| download | coreboot-f84926efca2f871fa557cccee36f0f773ec7190b.tar.gz coreboot-f84926efca2f871fa557cccee36f0f773ec7190b.tar.bz2 coreboot-f84926efca2f871fa557cccee36f0f773ec7190b.zip | |
tell people that the segment descriptors are different for ROMCC and
GCC code.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1740 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/x86/lapic/secondary.S')
| -rw-r--r-- | src/cpu/x86/lapic/secondary.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/x86/lapic/secondary.S b/src/cpu/x86/lapic/secondary.S index 5185021c3ca7..b212f43b382b 100644 --- a/src/cpu/x86/lapic/secondary.S +++ b/src/cpu/x86/lapic/secondary.S @@ -26,7 +26,7 @@ _secondary_start: orl $0x60000001, %eax /* CD, NW, PE = 1 */ movl %eax, %cr0 - ljmpl $0x10, $1f + ljmpl $0x10, $1f 1: .code32 movw $0x18, %ax |