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| author | Arthur Heymans <arthur@aheymans.xyz> | 2022-10-26 10:09:00 +0200 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2023-04-06 15:27:02 +0000 |
| commit | ddf48eb7c75687398d6a390bc21a50d74aef5df6 (patch) | |
| tree | efb8fabb318aaa64df34a31204a89c015838744e /src/cpu/x86/mp_init.c | |
| parent | a804f9195eb8fd93a2a6650cc24a26e422696214 (diff) | |
| download | coreboot-ddf48eb7c75687398d6a390bc21a50d74aef5df6.tar.gz coreboot-ddf48eb7c75687398d6a390bc21a50d74aef5df6.tar.bz2 coreboot-ddf48eb7c75687398d6a390bc21a50d74aef5df6.zip | |
cpu/mp_init.c: Only enable CPUs once they execute code
On some systems the BSP cannot know how many CPUs are present in the
system. A typical use case is a multi socket system. Setting the enable
flag only on CPUs that actually exist makes it more flexible.
Change-Id: I6c8042b4d6127239175924f996f735bf9c83c6e8
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68892
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/x86/mp_init.c')
| -rw-r--r-- | src/cpu/x86/mp_init.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c index df6bc4bc8768..a5d2ae6caa42 100644 --- a/src/cpu/x86/mp_init.c +++ b/src/cpu/x86/mp_init.c @@ -201,6 +201,7 @@ static asmlinkage void ap_init(unsigned int index) /* Fix up APIC id with reality. */ dev->path.apic.apic_id = lapicid(); dev->path.apic.initial_lapicid = initial_lapicid(); + dev->enabled = 1; if (cpu_is_intel()) printk(BIOS_INFO, "AP: slot %u apic_id %x, MCU rev: 0x%08x\n", index, @@ -387,6 +388,7 @@ static int allocate_cpu_devices(struct bus *cpu_bus, struct mp_params *p) continue; } new->name = processor_name; + new->enabled = 0; /* Runtime will enable it */ } return max_cpus; |