diff options
| author | Jeremy Compostella <jeremy.compostella@intel.com> | 2022-09-08 16:53:15 -0700 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-09-15 13:01:13 +0000 |
| commit | 2c021383c0ab847c927e8e964c3f55dd4d6deb0c (patch) | |
| tree | 31ad6695002d3a02b28a366dfea5f832be2db11d /src/cpu | |
| parent | 3ed3138eeb2b1154eb3d540e587f04c14b906c3b (diff) | |
| download | coreboot-2c021383c0ab847c927e8e964c3f55dd4d6deb0c.tar.gz coreboot-2c021383c0ab847c927e8e964c3f55dd4d6deb0c.tar.bz2 coreboot-2c021383c0ab847c927e8e964c3f55dd4d6deb0c.zip | |
cpu/intel/haswell: Allow up to six microcodes in the FIT table
Haswell and Broadwell platforms usually stitch six microcode
patches. It has worked so far with the default value of four thanks a
bug which is being fixed by `util/ifittool: Error out if microcodes do
not fit the FIT table' commit.
BUG=b:245380705
TEST=Jenkins build without failing on the FIT table size
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Change-Id: I23bf79a3e8918499f6c51e6ef829312d5872181a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67466
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/intel/haswell/Kconfig | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index 4a7a7fd9a82a..b486fd92e277 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -36,4 +36,7 @@ config SMM_RESERVED_SIZE config MAX_CPUS int default 8 + +config CPU_INTEL_NUM_FIT_ENTRIES + default 6 endif |