diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2022-09-13 12:43:37 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-09-14 20:28:37 +0000 |
| commit | 44807acaefc71cd4985779e742e6791cb9daf65d (patch) | |
| tree | 1f751da65e05f617f2fee0f822c806b4c2fdf33d /src/cpu | |
| parent | 62cd5e86031415843b8a0429ec05cca11b528902 (diff) | |
| download | coreboot-44807acaefc71cd4985779e742e6791cb9daf65d.tar.gz coreboot-44807acaefc71cd4985779e742e6791cb9daf65d.tar.bz2 coreboot-44807acaefc71cd4985779e742e6791cb9daf65d.zip | |
soc/amd/common: Add common function to get cpu count
This is the same for all supported AMD hardware.
Change-Id: Ic6b954308dbb4c5a2050f1eb8f15acb41d0b81bd
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67617
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/amd/agesa/family14/model_14_init.c | 3 | ||||
| -rw-r--r-- | src/cpu/amd/agesa/family15tn/model_15_init.c | 3 | ||||
| -rw-r--r-- | src/cpu/amd/agesa/family16kb/model_16_init.c | 3 | ||||
| -rw-r--r-- | src/cpu/amd/pi/00730F01/model_16_init.c | 3 |
4 files changed, 8 insertions, 4 deletions
diff --git a/src/cpu/amd/agesa/family14/model_14_init.c b/src/cpu/amd/agesa/family14/model_14_init.c index 21ef584f1743..1d2c29496102 100644 --- a/src/cpu/amd/agesa/family14/model_14_init.c +++ b/src/cpu/amd/agesa/family14/model_14_init.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <acpi/acpi.h> +#include <amdblocks/cpu.h> #include <amdblocks/smm.h> #include <console/console.h> #include <cpu/amd/msr.h> @@ -57,7 +58,7 @@ static void model_14_init(struct device *dev) mca_clear_status(); #if CONFIG(LOGICAL_CPUS) - siblings = cpuid_ecx(0x80000008) & 0xff; + siblings = get_cpu_count() - 1; // minus BSP if (siblings > 0) { msr = rdmsr_amd(CPU_ID_FEATURES_MSR); diff --git a/src/cpu/amd/agesa/family15tn/model_15_init.c b/src/cpu/amd/agesa/family15tn/model_15_init.c index de4423025ba0..c256ffcabfbb 100644 --- a/src/cpu/amd/agesa/family15tn/model_15_init.c +++ b/src/cpu/amd/agesa/family15tn/model_15_init.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <acpi/acpi.h> +#include <amdblocks/cpu.h> #include <amdblocks/smm.h> #include <console/console.h> #include <cpu/amd/msr.h> @@ -59,7 +60,7 @@ static void model_15_init(struct device *dev) mca_clear_status(); #if CONFIG(LOGICAL_CPUS) - siblings = cpuid_ecx(0x80000008) & 0xff; + siblings = get_cpu_count() - 1; // minus BSP if (siblings > 0) { msr = rdmsr_amd(CPU_ID_FEATURES_MSR); diff --git a/src/cpu/amd/agesa/family16kb/model_16_init.c b/src/cpu/amd/agesa/family16kb/model_16_init.c index 3698a8f89833..0f1113638ca1 100644 --- a/src/cpu/amd/agesa/family16kb/model_16_init.c +++ b/src/cpu/amd/agesa/family16kb/model_16_init.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <acpi/acpi.h> +#include <amdblocks/cpu.h> #include <amdblocks/smm.h> #include <console/console.h> #include <cpu/amd/msr.h> @@ -57,7 +58,7 @@ static void model_16_init(struct device *dev) mca_clear_status(); #if CONFIG(LOGICAL_CPUS) - siblings = cpuid_ecx(0x80000008) & 0xff; + siblings = get_cpu_count() - 1; // minus BSP if (siblings > 0) { msr = rdmsr_amd(CPU_ID_FEATURES_MSR); diff --git a/src/cpu/amd/pi/00730F01/model_16_init.c b/src/cpu/amd/pi/00730F01/model_16_init.c index a33b5f35b565..5b43a0726458 100644 --- a/src/cpu/amd/pi/00730F01/model_16_init.c +++ b/src/cpu/amd/pi/00730F01/model_16_init.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <amdblocks/cpu.h> #include <amdblocks/smm.h> #include <commonlib/helpers.h> #include <console/console.h> @@ -25,7 +26,7 @@ static void model_16_init(struct device *dev) mca_clear_status(); if (CONFIG(LOGICAL_CPUS)) { - siblings = cpuid_ecx(0x80000008) & 0xff; + siblings = get_cpu_count() - 1; // minus BSP if (siblings > 0) { msr = rdmsr_amd(CPU_ID_FEATURES_MSR); |