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| author | Elyes Haouas <ehaouas@noos.fr> | 2022-10-02 12:36:58 +0200 |
|---|---|---|
| committer | Martin Roth <martin.roth@amd.corp-partner.google.com> | 2022-10-06 17:00:35 +0000 |
| commit | 7df5c68689173e3ab9c76fbda919268a774efac7 (patch) | |
| tree | 6c881504eb0fac08bd98420617947586073da187 /src/cpu | |
| parent | 419c5785c595574ebb8cce489078856990105a87 (diff) | |
| download | coreboot-7df5c68689173e3ab9c76fbda919268a774efac7.tar.gz coreboot-7df5c68689173e3ab9c76fbda919268a774efac7.tar.bz2 coreboot-7df5c68689173e3ab9c76fbda919268a774efac7.zip | |
cpu/intel/car/romstage.c: Clean up includes and add <types.h>
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I84639389ac1066468b82bb13d684e5423b909fcb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68040
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/intel/car/romstage.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/cpu/intel/car/romstage.c b/src/cpu/intel/car/romstage.c index 7a7d077fddfc..4c68ded1eecb 100644 --- a/src/cpu/intel/car/romstage.c +++ b/src/cpu/intel/car/romstage.c @@ -1,14 +1,14 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <arch/cpu.h> #include <arch/romstage.h> -#include <console/console.h> -#include <cpu/x86/smm.h> #include <arch/symbols.h> #include <commonlib/helpers.h> +#include <console/console.h> +#include <cpu/x86/smm.h> #include <program_loading.h> #include <romstage_common.h> #include <security/vboot/vboot_common.h> +#include <types.h> /* If we do not have a constrained _car_stack region size, use the following as a guideline for acceptable stack usage. */ |