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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-18 06:55:52 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-26 22:53:31 +0000 |
| commit | a7d2f2982364f7b9c0c0410f7ba07e6d6c7aa527 (patch) | |
| tree | 30a1b7d01f80c24b0504ab335dd0ab66895c0c0e /src/cpu | |
| parent | 8418fd418c8fcef5ca59109be33dececee9cda29 (diff) | |
| download | coreboot-a7d2f2982364f7b9c0c0410f7ba07e6d6c7aa527.tar.gz coreboot-a7d2f2982364f7b9c0c0410f7ba07e6d6c7aa527.tar.bz2 coreboot-a7d2f2982364f7b9c0c0410f7ba07e6d6c7aa527.zip | |
intel/car: Use common TS_START_ROMSTAGE
This timestamp also got unintentionally removed from some
boards as they were transformed to use common romstage entry.
Change-Id: I12be278a674f9a2ea073b170a223c41c7fc01a94
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34970
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/intel/car/romstage.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/cpu/intel/car/romstage.c b/src/cpu/intel/car/romstage.c index ac81b021a89c..547b1211df82 100644 --- a/src/cpu/intel/car/romstage.c +++ b/src/cpu/intel/car/romstage.c @@ -87,6 +87,8 @@ asmlinkage void bootblock_c_entry_bist(uint64_t base_timestamp, uint32_t bist) asmlinkage void car_stage_entry(void) { + timestamp_add_now(TS_START_ROMSTAGE); + /* Assumes the hardware was set up during the bootblock */ console_init(); |