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| author | Arthur Heymans <arthur@aheymans.xyz> | 2021-11-17 17:25:48 +0100 |
|---|---|---|
| committer | David Hendricks <david.hendricks@gmail.com> | 2023-02-06 00:22:46 +0000 |
| commit | 20d25779c8eab9e21668a18a6180d75775f4eaee (patch) | |
| tree | 521cf8f4f8c9a4be624c22ffac10cc0e85ebd445 /src/device/pci_device.c | |
| parent | 306bd40939dfee091186d28e1668607bc144decb (diff) | |
| download | coreboot-20d25779c8eab9e21668a18a6180d75775f4eaee.tar.gz coreboot-20d25779c8eab9e21668a18a6180d75775f4eaee.tar.bz2 coreboot-20d25779c8eab9e21668a18a6180d75775f4eaee.zip | |
device/pci_device.c: Add way to limit max bus numbers
By default this limits PCI buses to CONFIG_MMCONF_BUS_NUMBER.
Some platforms have multiple PCI root busses (e.g. xeon_sp), where bus
numbers are limited. This provides a basic check. On some platforms it
looks like programming 0xff to the subordinate bus number confuses and
hangs the hardware.
Change-Id: I0582b156df1a5f76119a3687886c4d58f2d3ad6f
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59395
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Diffstat (limited to 'src/device/pci_device.c')
| -rw-r--r-- | src/device/pci_device.c | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/src/device/pci_device.c b/src/device/pci_device.c index 9de294698af3..e600f34fe661 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -1532,6 +1532,18 @@ static void pci_bridge_route(struct bus *link, scan_state state) if (state == PCI_ROUTE_SCAN) { link->secondary = parent->subordinate + 1; link->subordinate = link->secondary + dev->hotplug_buses; + link->max_subordinate = parent->max_subordinate + ? parent->max_subordinate + : (CONFIG_ECAM_MMCONF_BUS_NUMBER - 1); + } + + if (link->secondary > link->max_subordinate) + die("%s: No more busses available!\n", __func__); + + /* This ought to only happen with hotplug buses. */ + if (link->subordinate > link->max_subordinate) { + printk(BIOS_WARNING, "%s: Limiting subordinate busses\n", __func__); + link->subordinate = link->max_subordinate; } if (state == PCI_ROUTE_CLOSE) { @@ -1541,7 +1553,7 @@ static void pci_bridge_route(struct bus *link, scan_state state) } else if (state == PCI_ROUTE_SCAN) { primary = parent->secondary; secondary = link->secondary; - subordinate = 0xff; /* MAX PCI_BUS number here */ + subordinate = link->max_subordinate; } else if (state == PCI_ROUTE_FINAL) { primary = parent->secondary; secondary = link->secondary; |