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| author | Nico Huber <nico.h@gmx.de> | 2022-08-15 00:08:58 +0200 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2022-09-04 16:39:14 +0000 |
| commit | 577c6b9225515aeb32918881bfb5503c3fd71068 (patch) | |
| tree | 1bac9101bb9406e3d88d52e633b89a8ee8f1a567 /src/device/pci_device.c | |
| parent | 526c64249a0a0c7b83d1914b88d4f938ede7dc1c (diff) | |
| download | coreboot-577c6b9225515aeb32918881bfb5503c3fd71068.tar.gz coreboot-577c6b9225515aeb32918881bfb5503c3fd71068.tar.bz2 coreboot-577c6b9225515aeb32918881bfb5503c3fd71068.zip | |
pciexp_device: Propagate above-4G flag to all hotplug devices
The `IORESOURCE_ABOVE_4G` flag was only explicitly set for our dummy
device that reserves resources behind a hotplug port. The current re-
source allocator implicitly extends this to all devices below the port,
including real ones. Let's make that explicit, so future changes to the
allocator can't break this rule.
Change-Id: Id4c90b60682cf5c8949cde25362d286625b3e953
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66719
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/device/pci_device.c')
| -rw-r--r-- | src/device/pci_device.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/device/pci_device.c b/src/device/pci_device.c index 232328dca828..52107f2fd368 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -164,8 +164,12 @@ struct resource *pci_get_resource(struct device *dev, unsigned long index) /* A Memory mapped base address. */ attr &= PCI_BASE_ADDRESS_MEM_ATTR_MASK; resource->flags |= IORESOURCE_MEM; - if (attr & PCI_BASE_ADDRESS_MEM_PREFETCH) + if (attr & PCI_BASE_ADDRESS_MEM_PREFETCH) { resource->flags |= IORESOURCE_PREFETCH; + if (CONFIG(PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G) + && dev_path_hotplug(dev)) + resource->flags |= IORESOURCE_ABOVE_4G; + } attr &= PCI_BASE_ADDRESS_MEM_LIMIT_MASK; if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_32) { /* 32bit limit. */ |