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| author | Arthur Heymans <arthur@aheymans.xyz> | 2022-01-06 20:56:01 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-01-12 16:20:50 +0000 |
| commit | db199cc0735d009f95cbb4eb2b9d422dad509203 (patch) | |
| tree | 678fec3b63077fc94567d0b7570bb52ea17dc6c8 /src/device/pci_device.c | |
| parent | 5352d223783ea2b178412839a3ff57070733c554 (diff) | |
| download | coreboot-db199cc0735d009f95cbb4eb2b9d422dad509203.tar.gz coreboot-db199cc0735d009f95cbb4eb2b9d422dad509203.tar.bz2 coreboot-db199cc0735d009f95cbb4eb2b9d422dad509203.zip | |
device/pci_device.c: Make sure the PCI bus has a device
Some SOC add PCI root busses structs at runtime without adding a
device struct to the bus because pci_scan_bus does it. An example
would be xeon_sp which has multiple root busses.
TEST: ocp/deltalake boots again.
Change-Id: I81d9c94652e34dbf9e8cec64fc34ef0042563037
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60876
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Diffstat (limited to 'src/device/pci_device.c')
| -rw-r--r-- | src/device/pci_device.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/device/pci_device.c b/src/device/pci_device.c index a61fbd6c4944..ed95dff953b7 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -1216,6 +1216,9 @@ static bool pci_bus_only_one_child(struct bus *bus) u16 pcie_pos, pcie_flags_reg; int pcie_type; + if (!bridge) + return false; + pcie_pos = pci_find_capability(bridge, PCI_CAP_ID_PCIE); if (!pcie_pos) return false; |