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| author | Tony Huang <tony-huang@quanta.corp-partner.google.com> | 2022-08-02 12:51:56 +0800 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2022-08-07 19:35:52 +0000 |
| commit | df864709a5d185602f9cb4ab42689dba02ecbc35 (patch) | |
| tree | b447e933fa806fb63c7329de20f0f4b16a3aad75 /src/device/pci_device.c | |
| parent | 66d090b66446863151790cb0bbbe604d74508846 (diff) | |
| download | coreboot-df864709a5d185602f9cb4ab42689dba02ecbc35.tar.gz coreboot-df864709a5d185602f9cb4ab42689dba02ecbc35.tar.bz2 coreboot-df864709a5d185602f9cb4ab42689dba02ecbc35.zip | |
mb/google/brya/variants/agah: update dptf setting
1. Add active policy
2. Set critical policy trigger point to 105C
3. Correct TSR location
BUG=b:240634844
TEST=emerge-draco coreboot
values provided and verified by thermal team
Change-Id: I0d91bad03cbdeea5c84b533580ac98072ce0110b
Signed-off-by: Tony Huang <tony-huang@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66351
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Diffstat (limited to 'src/device/pci_device.c')
0 files changed, 0 insertions, 0 deletions