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author | Arthur Heymans <arthur@aheymans.xyz> | 2023-08-24 15:12:19 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2024-01-31 10:36:39 +0000 |
commit | 7fcd4d58ec7ea2da31c258ba9d8601f086d7f8d8 (patch) | |
tree | 1bddf10cecf4577fee207e0dbc6f7a5c1b10af13 /src/device/pci_rom.c | |
parent | 3138faa7cf1b91e0b56ad0b1be6260cf4251a284 (diff) | |
download | coreboot-7fcd4d58ec7ea2da31c258ba9d8601f086d7f8d8.tar.gz coreboot-7fcd4d58ec7ea2da31c258ba9d8601f086d7f8d8.tar.bz2 coreboot-7fcd4d58ec7ea2da31c258ba9d8601f086d7f8d8.zip |
device/device.h: Rename busses for clarity
This renames bus to upstream and link_list to downstream.
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: I80a81b6b8606e450ff180add9439481ec28c2420
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78330
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/device/pci_rom.c')
-rw-r--r-- | src/device/pci_rom.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c index cc1e5d1277fe..1e212ab21686 100644 --- a/src/device/pci_rom.c +++ b/src/device/pci_rom.c @@ -230,7 +230,7 @@ ati_rom_acpi_fill_vfct(const struct device *device, acpi_vfct_t *vfct_struct, printk(BIOS_ERR, "%s failed\n", __func__); return current; } - if (device->bus->segment_group) { + if (device->upstream->segment_group) { printk(BIOS_ERR, "VFCT only supports GPU in first PCI segment group.\n"); return current; } @@ -243,7 +243,7 @@ ati_rom_acpi_fill_vfct(const struct device *device, acpi_vfct_t *vfct_struct, header->DeviceID = device->device; header->VendorID = device->vendor; - header->PCIBus = device->bus->secondary; + header->PCIBus = device->upstream->secondary; header->PCIFunction = PCI_FUNC(device->path.pci.devfn); header->PCIDevice = PCI_SLOT(device->path.pci.devfn); header->ImageLength = rom->size * 512; |