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| author | Angel Pons <th3fanbus@gmail.com> | 2021-03-28 13:49:39 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2021-04-05 13:01:37 +0000 |
| commit | 18571389d5f6a3882ad0512ead712233a3a117a6 (patch) | |
| tree | 6257f551a08027e5430ae0dddde8017cc87730ec /src/device | |
| parent | afb3d7e7ecccdc1fbde66fe08252bd97de4df35d (diff) | |
| download | coreboot-18571389d5f6a3882ad0512ead712233a3a117a6.tar.gz coreboot-18571389d5f6a3882ad0512ead712233a3a117a6.tar.bz2 coreboot-18571389d5f6a3882ad0512ead712233a3a117a6.zip | |
device/dram/ddr3: Rename DDR3 SPD memory types
To avoid name clashes with definitions for other DRAM generations,
rename the enum type and values to contain `ddr3` or `DDR3`.
Change-Id: If3710149ba94b94ed14f03e32f5e1533b4bc25c8
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51896
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/device')
| -rw-r--r-- | src/device/dram/ddr3.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/src/device/dram/ddr3.c b/src/device/dram/ddr3.c index b38e0a1a0d8c..d28bfbea4d4a 100644 --- a/src/device/dram/ddr3.c +++ b/src/device/dram/ddr3.c @@ -27,11 +27,11 @@ * * @param type DIMM type. This is byte[3] of the SPD. */ -int spd_dimm_is_registered_ddr3(enum spd_dimm_type type) +int spd_dimm_is_registered_ddr3(enum spd_dimm_type_ddr3 type) { - if ((type == SPD_DIMM_TYPE_RDIMM) - | (type == SPD_DIMM_TYPE_MINI_RDIMM) - | (type == SPD_DIMM_TYPE_72B_SO_RDIMM)) + if ((type == SPD_DDR3_DIMM_TYPE_RDIMM) + | (type == SPD_DDR3_DIMM_TYPE_MINI_RDIMM) + | (type == SPD_DDR3_DIMM_TYPE_72B_SO_RDIMM)) return 1; return 0; @@ -544,22 +544,22 @@ enum cb_err spd_add_smbios17(const u8 channel, const u8 slot, dimm->mod_id = info->manufacturer_id; switch (info->dimm_type) { - case SPD_DIMM_TYPE_SO_DIMM: + case SPD_DDR3_DIMM_TYPE_SO_DIMM: dimm->mod_type = SPD_SODIMM; break; - case SPD_DIMM_TYPE_72B_SO_CDIMM: + case SPD_DDR3_DIMM_TYPE_72B_SO_CDIMM: dimm->mod_type = SPD_72B_SO_CDIMM; break; - case SPD_DIMM_TYPE_72B_SO_RDIMM: + case SPD_DDR3_DIMM_TYPE_72B_SO_RDIMM: dimm->mod_type = SPD_72B_SO_RDIMM; break; - case SPD_DIMM_TYPE_UDIMM: + case SPD_DDR3_DIMM_TYPE_UDIMM: dimm->mod_type = SPD_UDIMM; break; - case SPD_DIMM_TYPE_RDIMM: + case SPD_DDR3_DIMM_TYPE_RDIMM: dimm->mod_type = SPD_RDIMM; break; - case SPD_DIMM_TYPE_UNDEFINED: + case SPD_DDR3_DIMM_TYPE_UNDEFINED: default: dimm->mod_type = SPD_UNDEFINED; break; |