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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2022-02-04 19:34:53 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-08 16:18:42 +0000 |
| commit | 83bc4084160310330d6bf198ffdcc980b30dc429 (patch) | |
| tree | d66dae4779860e74ef7fa470caba6dcdd14d1610 /src/device | |
| parent | af382a77d719ac7e2407c8f47376706a00d32c80 (diff) | |
| download | coreboot-83bc4084160310330d6bf198ffdcc980b30dc429.tar.gz coreboot-83bc4084160310330d6bf198ffdcc980b30dc429.tar.bz2 coreboot-83bc4084160310330d6bf198ffdcc980b30dc429.zip | |
device/dram/ddr2.c: Fix log messages
Change 'printk(BIOS_WARNING, "ERROR:' to printk(BIOS_ERR, "'.
Change-Id: Id25bdb1e6b6d7085eff9c2be8263223a91dff061
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61629
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/device')
| -rw-r--r-- | src/device/dram/ddr2.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/src/device/dram/ddr2.c b/src/device/dram/ddr2.c index 0eba0e384c55..2ade8ef09806 100644 --- a/src/device/dram/ddr2.c +++ b/src/device/dram/ddr2.c @@ -322,13 +322,13 @@ int spd_decode_ddr2(struct dimm_attr_ddr2_st *dimm, u8 spd[SPD_SIZE_MAX_DDR2]) printram("SPD contains 0x%02x bytes\n", spd_size); if (spd_size < 64 || eeprom_size < 64) { - printk(BIOS_WARNING, "ERROR: SPD to small\n"); + printk(BIOS_ERR, "SPD too small\n"); dimm->dram_type = SPD_MEMORY_TYPE_UNDEFINED; return SPD_STATUS_INVALID; } if (spd_ddr2_calc_checksum(spd, spd_size) != spd[63]) { - printk(BIOS_WARNING, "ERROR: SPD checksum error\n"); + printk(BIOS_ERR, "SPD checksum error\n"); dimm->dram_type = SPD_MEMORY_TYPE_UNDEFINED; return SPD_STATUS_CRC_ERROR; } @@ -336,8 +336,7 @@ int spd_decode_ddr2(struct dimm_attr_ddr2_st *dimm, u8 spd[SPD_SIZE_MAX_DDR2]) reg8 = spd[62]; if ((reg8 & 0xf0) != 0x10) { - printk(BIOS_WARNING, - "ERROR: Unsupported SPD revision %01x.%01x\n", + printk(BIOS_ERR, "Unsupported SPD revision %01x.%01x\n", reg8 >> 4, reg8 & 0xf); dimm->dram_type = SPD_MEMORY_TYPE_UNDEFINED; return SPD_STATUS_INVALID; @@ -348,7 +347,7 @@ int spd_decode_ddr2(struct dimm_attr_ddr2_st *dimm, u8 spd[SPD_SIZE_MAX_DDR2]) reg8 = spd[2]; printram(" Type : 0x%02x\n", reg8); if (reg8 != 0x08) { - printk(BIOS_WARNING, "ERROR: Unsupported SPD type %x\n", reg8); + printk(BIOS_ERR, "Unsupported SPD type %x\n", reg8); dimm->dram_type = SPD_MEMORY_TYPE_UNDEFINED; return SPD_STATUS_INVALID; } |